INA271-HT datasheet(12/18 Pages) TI

12 / 18 page

0.48

0.44

0.40

0.36

0.32

0.28

0.24

0.20

0.16

0.12

0.08

0.04

(mV)

SENSE

INA271V

OUT Limit

(1)

CM2

CM1

CM3

CM4

CM2

CM3

CM4

,andV

illustratethevariance

fromparttopartoftheV

thatcancause

maximumV

withV

<20mV.

OUT

SENSE

limitatV

=0mV,

OUT

SENSE

CM1

£ V

NOTE:(1)INA271V

Limit=0.4V.INA270V

Limit=0.28V.

OUT

Ideal

INA271-HT

SBOS521D – SEPTEMBER 2010 – REVISED AUGUST 2013

www.ti.com

Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS

SHUTDOWN

This region of operation is the least accurate for the

The INA271 does not provide a shutdown pin;

INA271. To achieve the wide input common-mode

however, because it consumes a quiescent current

voltage range, this device uses two op amp front

less than 1mA, it can be powered by either the output

ends in parallel. One op amp front end operates in

of logic gates or by transistor switches to supply

the positive input common-mode voltage range, and

power. Driving the gate low shuts down the INA271.

the other in the negative input region. For this case,

Use a totem-pole output buffer or gate that can

neither of these two internal amplifiers dominates and

provide sufficient drive along with 0.1

μF bypass

overall loop gain is very low. Within this region, VOUT

capacitor,

preferably

ceramic

with

good

high-

approaches voltages close to linear operation levels

frequency characteristics. This gate should have a

for Normal Case 2.

supply voltage of 3V or greater because the INA271

requires a minimum supply greater than 2.7V. In

This deviation from linear operation becomes greatest

addition to eliminating quiescent current, this gate

the closer VSENSE approaches 0V. Within this region,

also turns off the 10

μA bias current present at each

as VSENSE approaches 20mV, device operation is

of the inputs. Note that the IN+ and IN– inputs are

closer to that described by Normal Case 2. Figure 19

able to withstand full common-mode voltage under all

illustrates this behavior for the INA271. The VOUT

powered and under-powered conditions. An example

maximum peak for this case is determined by

shutdown circuit is illustrated in Figure 20.

maintaining a constant VS, setting VSENSE = 0mV, and

sweeping VCM from 0V to VS. The exact VCM at which

RFI/EMI

VOUT peaks during this case varies from part to part.

The maximum peak voltage for the INA271 is 0.4V.

Attention

good

layout

practices

always

recommended.

Keep

traces

short

and,

when

possible, use a printed circuit board (PCB) ground

plane with surface-mount components placed as

close to the device pins as possible. Small ceramic

capacitors placed directly across amplifier inputs can

reduce RFI/EMI sensitivity. PCB layout should locate

the amplifier as far away as possible from RFI

sources. Sources can include other components in

the same system as the amplifier itself, such as

inductors (particularly switched inductors handling a

lot of current and at high frequencies). RFI can

generally be identified as a variation in offset voltage

or dc signal levels with changes in the interfering RF

signal. If the amplifier cannot be located away from

sources of radiation, shielding may be needed.

Twisting wire input leads makes them more resistant

to RF fields. The difference in input pin location of the

INA271 versus the INA193–INA198 may provide

different EMI performance.

Figure 19. Example for Low VSENSE Case 2

(Gain = 20)

Submit Documentation Feedback

Product Folder Links: INA271-HT

INA271-HT датащи(PDF) 12 Page - Texas Instruments

INA271-HT датащи(HTML) 12 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

датащи скачать

ссылки URL