LMP8278

ADC

0

50

100

150

200

250

300

1.00

1.25

1.50

1.75

2.00

2.25

2.50

2.75

3.00

TIME (ns)

10 pF

20 pF

LMP8278

0V

LMP8278

SNAS575A – FEBRUARY 2012 – REVISED MARCH 2013

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Figure 24. Driving Switched Capacitive Load

This circuit simulates the switched connection of a discharged capacitor to the LMP8278 output. The resulting

The figure can be used to estimate the disturbance that will be caused when driving a switched capacitive load.

To minimize the error signal introduced by the sampling that occurs on the ADC input, an additional RC filter can

be placed in between the LMP8278 and the ADC as illustrated in Figure 26.

The external capacitor absorbs the charge that flows when the ADC sampling capacitor is connected. The

external capacitor should be much larger than the sample and hold capacitor at the input of the ADC and the RC

time constant of the external filter should be such that the speed of the system is not affected.

Figure 25. Capacitive Load Response

Figure 26. Reduce Error When Driving ADCs

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