17

SL1711

ABSOLUTE MAXIMUM RATINGS

All voltages are reffered to Vee at 0V

Characteristics

Min

Max

Units

Conditions

Supply voltage, Vcc

-0.3

7

V

IFFIN &IFINB input voltage

2.5

Vp-p

IFIN & IFINB input DC offset

-0.3

Vcc+0.3

V

IOUT & QOUT DC offset

-0.3

Vcc+0.3

V

AGC DC offset

-0.3

Vcc+0.3

V

VCO1 & 2 DC offset

-0.3

Vcc+0.3

V

VCODDIS DC offset

-0.3

Vcc+0.3

V

PSCAL & PSCALB DC offset

-0.3

Vcc+0.3

Storage temperature

-55

125

°C

Junction temperature

150

°C

PSOP16 package thermal

TBA

°C/W

resistance, chip to ambient

PSOP16 package thermal

TBA

°C/W

resitance, chip to case

MP16 package thermal resistance

81

°C/W

chip to Ambient

MP16 package thermal resistance

28

°C/W

chip to case

Power consumption at 5.25V

657

mW

ESD protection

2

kV

Mil std 883B method 3015 cat 1

ADDITIONAL INFORMATION REGARDING THE PSOP PACKAGE.

The following information should be noted when using the PSOP package fitted to the SL1711.

(a)

This package uses the standard SOIC 16 footprint.

(b)

There is no need to make a thermal connection between the package and the board. If such a connection is made using

a thermal adhesive this will enhance the long term reliability of the product by reducing the junction temperature.

(c)

The heatsink that is evident on the base of the package is solderable.

(d)

There is no direct electrical connection between any of the device pins and the metal heatsinkslug. However if the

heatsink is to be electrically connected to the PCB these connections should be confined to the ground plane.