CMOS

MT9080

2-121

† Timing is over recommended temperature and power supply voltages.

‡ Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.

Figure 28 - Microprocessor Read Timing for Connect Memory Mode, Data Memory Mode and

External Mode

Characteristics

Sym

Min

Max

Units

Test Conditions

1

Chip Select Setup

0ns

2

Chip Select Hold

0ns

3

ADDR, R/W Setup

0ns

4

ADDR, R/W Hold

0ns

5DTA Delay

4.5

9

6DTA Hold

0ns

7

Valid Data Out to DTA Low

8DS High to Data Invalid

027

ns

9

Output Data Active to High Z

31

ns

DS

CS

A0-A15, R/W

DTA

Data Bus*

* In Data Memory Mode and External Mode, data is clocked out on D0o-D15o; in Connect Memory Mode data is clocked out on

D0i-D15i (bidirectional).