MT9042

Preliminary Information

3-102

Locking Range and Lock Time

The locking range of the PLL is the range that the

input reference frequency can be deviated from its

nominal frequency while the output signals maintain

synchronization.

The

relevant

value

is

usually

specified in parts-per-million (ppm). For both the T1

and E1 outputs, lock was maintained while an 8 kHz

input was varied between 7900 Hz to 8100 Hz

(corresponding to

±12500 ppm). This is well beyond

the required

±100 ppm. The lock range of 12500

ppm also applies to 1.544 MHz and 2.048 MHz

reference inputs.

The lock time is a measure of how long it takes the

PLL

to

reach

steady

state

frequency

after

a

frequency step on the reference input signal. The

locking time is measured by applying an 8000 Hz

signal to the primary reference and an 8000.8 Hz

(+100 ppm) to the secondary reference. The output

is monitored with a time interval analyzer during slow

periodic rearrangements on the reference inputs.

The lock time for both the T1 and E1 outputs is

approximately 311 ms, which is well below the

required lock time of 1.0 seconds.

Holdover and Freerun Accuracy

The holdover option of the PLL provides the user

with the capability of maintaining the integrity of

output signals when the input reference signals are

lost. Holdover performance is defined as the rate of

slip (i.e., amount of slip on 60 seconds) of the 8 kHz

reference input. For both the T1 and E1 outputs the

rate of slip was measured as a function of the input

reference frequency. The results measured over an

observation period of 60 seconds, are presented in

Table 5.

The freerun accuracy of the PLL is a measure of how

accurately the PLL can reproduce the desired output

frequency. The freerun accuracy is a function of

master clock frequency which must be 20 MHz

±32

ppm in order to meet AT & T TR62411 and ETSI

specifications.

Maximum Time Interval Error (MTIE)

MTIE is a measure of the rate of change of phase on

the output signal due to a step in phase on the

reference

input.

The

specification

also

clearly

indicates a peak constraint on the characteristic of

the output signal. The specification is uniquely a

function of the loop bandwidth (or loop delay) of the

PLL. AT & T TR62411 clearly indicates that a

Reference Input

Frequency

% of Frame Pulse Slip

8 kHz

8%

1.544 MHz

58%

2.048 Hz

58%

Table 5 - Holdover Slip Rate (60 seconds)

Description

Freerun

Normal

(PRI)

Normal

(SEC)

Holdover

(PRI)

Holdover

(SEC)

State

P1P2P3

P4a

P4b

Power On (RST=0

LOSS1=X LOSS2=X)

No change

Invalid state

Invalid state

Invalid state

Invalid state

LOSS1=0 LOSS2=0

P2

No change

P2

P2

P2

LOSS1=1 LOSS2=0

time loss < tgt

P3

P4a

ST.GD

No change

No change

P3

LOSS1=1 LOSS2=0

time loss > tgt

P3

Invalid state

No change

P3

P3

LOSS1=0 LOSS2=1

P2

No change

P2

P2

P2

LOSS1=1 LOSS2=1

No change

P4a

P4b

No change

No change

Where : ST.GD = Start guard time; X = Don’t care

Table 4 - State Table For Automatic Input Reference Selection and Operating Mode