M37270MF-101SP datasheet(47/94 Pages) MITSUBISHI

47 / 94 page

MITSUBISHI MICROCOMPUTERS

M37270MF-XXXSP

M37270EF-XXXSP, M37270EFSP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER

and ON-SCREEN DISPLAY CONTROLLER

Flash mode selection bit

0 : Color signal of character

background part does not

flash

1 : Color signal of character

background part flashes

OSD control register

(OC : address 00CE16)

OSD control bit (Note 1)

0 : All-blocks display off

1 : All-blocks display on

Scan mode selection bit

0 : Normal scan mode

1 : Bi-scan mode

Border type selection bit

0 : All bordered

1 : Shadow bordered (Note 2)

Automatic solid space control

bit

0 : OFF

1 : ON

Window control bit

0 : OFF

1 : ON

Layer mixing control bits (Note 3)

b7 b6

0 0 : Logical sum (OR) of

layer 1’s color and

layer 2’s color

0 1 : Layer 1’s color has priority

1 0 : Layer 2’s color has priority

1 1 : Do not set

Notes 1 : Even this bit is switched during display, the display screen

remains unchanged until a rising (falling) of the next VSYNC.

2 : Shadow border is output at right and bottom side of the font.

3 : Set “00” during displaying extra fonts.

Display layer

Layer 1

Layer 2

Dot size

1TC ! 1/2H

1TC ! 1H

2TC ! 2H

3TC ! 3H

1TC ! 1/2H

1TC ! 1H

2TC ! 2H

3TC ! 3H

1TC ! 1/2H

1TC ! 1H

2TC ! 2H

3TC ! 3H

1TC ! 1/2H

1TC ! 1H

1TC ! 1/2H

1TC ! 1H

1.5TC ! 1/2H

1.5TC ! 1H

—

Table 11. Setting value of block control registers

Pre-divide

ratio

! 1

! 2

! 3

! 1

! 2

CS6

—

Notes 1: CS6 : Bit 6 of clock control register (Address 021616)

2: TC : OSD clock cycle divided in the pre-divide circuit

3: H: HSYNC

Block control register i

(i = 1 to 16)

(BCi : addresses 00D016 to 00DF)

Display mode selection bits

b1 b0

0 : Display OFF

1 : OSD mode

0 : CC mode

1 : EXOSD mode

Border control bit

0 : Border OFF

1 : Border ON

Notes : Bit 4 of the color code 1 controls OUT1 output

when bit 7 is “0.”

Bit 4 of the color code 1 controls OUT2 output

when bit 7 is “1.”

Dot size selection bit

Refer to Table 11.

Pre-divide ratio • layer selection

bits

Refer to Table 11.

OUT 2 output control bit (Note)

0 : OUT2 output OFF

1 : OUT2 output ON

Fig. 50. Structure of block control registers

Fig. 49. Structure of OSD control register

M37270MF-101SP датащи(PDF) 47 Page - Mitsubishi Electric Semiconductor

M37270MF-101SP датащи(HTML) 47 Page - Mitsubishi Electric Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94

датащи скачать

ссылки URL