A43L3616A datasheet(2/41 Pages) AMICC

2 / 41 page

A43L3616A Series

2M x 16 Bit x 4 Banks Synchronous DRAM

Preliminary

PRELIMINARY (November, 2011, Version 0.8)

AMIC Technology, Corp.

Features

JEDEC standard 3.3V ± 0.3V power supply

LVTTL compatible with multiplexed address

Four banks / Pulse

RAS

MRS cycle with address key programs

- CAS Latency (2,3)

- Burst Length (1,2,4,8)

- Burst Type (Sequential & Interleave)

All inputs are sampled at the positive going edge of the

system clock

Industrial operating range: -40

°C to +85°C for –U

Automotive temperature operation:-40

°C to +85°C for -A

Burst Read Single-bit Write operation

DQM for masking

Auto & self refresh

64ms refresh period (4K cycle)

Available in 54 Balls CSP (8mm X 8mm) and 54-pin

TSOP(II) packages

Package is available to lead free (-F series)

All Pb-free (Lead-free) products are RoHS compliant

General Description

The A43L3616A is 134,217,728 bits synchronous high data

rate Dynamic RAM organized as 4 X 2,097,152 words by 16

bits,

abricated

with

AMIC’s

high

performance

CMOS

technology. Synchronous design allows precise cycle control

with the use of system clock. I/O transactions are possible on

every

clock

cycle.

Range

operating

frequencies,

programmable latencies allow the same device to be useful

for a variety of high bandwidth, high performance memory

system applications.

Pin Configuration

54 Balls CSP (8 mm x 8 mm)

Top View

54 Ball (6X9) CSP

VSS

DQ15

VSSQ

VDDQ

DQ0

VDD

DQ14

DQ13

VDDQ

VSSQ

DQ2

DQ1

DQ12

DQ11

VSSQ

VDDQ

DQ4

DQ3

DQ10

DQ9

VDDQ

VSSQ

DQ6

DQ5

DQ8

VSS

VDD

LDQM

DQ7

UDQM

CLK

CKE

CAS

RAS

A11

BA0

BA1

A10

VSS

VDD

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