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LM5037MT/NOPB датащи(PDF) 33 Page - Texas Instruments |
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LM5037MT/NOPB датащи(HTML) 33 Page - Texas Instruments |
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33 / 40 page ![]() RAMP RT1 CS OUTB PGND SS RES UVLO COMP FB RT2 REF VIN VCC OUTA AGND LM5037 From VIN From FB From CS To GDA To GDB LM5037 www.ti.com SNVS578D – NOVEMBER 2008 – REVISED MAY 2015 10 Layout 10.1 Layout Guidelines The LM5037 device current sense and PWM comparators are very fast, and respond to short duration noise pulses. Place components for the CS, COMP, SS, UVLO, RT2 and the RT1/SYNC pins as physically close as possible to the device. This placement minimizes noise pickup on the PC board trace inductances. Layout considerations are critical for the current sense filter. If a current sense transformer is used, both leads of the transformer secondary should be routed to the sense filter components and to the device pins. The ground side of the transformer should be connected via a dedicated PC board trace to the AGND pin, rather than through the ground plane. If the current sense circuit employs a sense resistor in the drive transistor source, low inductance resistors should be used. In this case, all the noise sensitive, low-current ground trace should be connected in common near the device, and then a single connection made to the power ground (sense resistor ground point). While employing current mode control, RAMP pin capacitor and CS pin capacitor must be placed close to the device. Also, a short direct trace should be employed to connect RAMP capacitor to the CS pin. The gate drive outputs of the device should have short, direct paths to the power MOSFETs in order to minimize inductance in the PC board The two ground pins (AGND, PGND) must be connected together with a short, direct connection, to avoid jitter due to relative ground bounce. If the internal dissipation of the device produces high junction temperatures during normal operation, the use of multiple vias under the device to a ground plane can help conduct heat away from the device. Judicious positioning of the PC board within the end product, along with use of any available air flow (forced or natural convection) helps reduce the junction temperatures. If using forced air cooling, avoid placing the device in the airflow shadow of tall components, such as input capacitors. 10.2 Layout Example Figure 35. LM5037 Board Layout Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 33 Product Folder Links: LM5037 |
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