t2 =

1 2A

= 1.5 x 10

t1 =

50 2A

= 3 x 10

SS

t3 =

50 2A

= 7 x 10

SS

t2 =

1 2A

= 1.5 x 10

LM5032

SNVS344B – MARCH 2005 – REVISED DECEMBER 2014

www.ti.com

Application Information (continued)

(8)

(9)

The time t2 provides a periodic dwell time for the converter in the event of a sustained overload or short circuit.

This results in lower average input current and lower power dissipated within the circuit components. It is

recommended that the ratio of t2/(t1 + t3) be in the range of 5 to 10 to make good use of this feature.

If the application requires no delay from the first detection of a current limit condition, so that t1 is effectively

zero, the RES pin can be left open (no external capacitor). If it is desired to disable the hiccup mode current limit

operation then the RES pin should be connected to ground.

8.1.9 Soft-Start

The capacitors at SS1 and SS2 determine the time required for each regulator’s output duty cycle to increase

from zero to its final value for regulation. The minimum acceptable time is dependent on the output capacitance

and the response of each feedback loop to the COMP pin. If the Soft-start time is too quick, the output could

significantly overshoot its intended voltage before the feedback loop has a chance to regulate the PWM

controller.

as its external capacitor is charged up by an internal 50 µA current source (see Figure 1). The voltage at the

COMP pins follow the SS pins. When both have reached

≊1.5V, PWM pulses appear at the driver outputs with

very low duty cycle. The voltage at each SS pin continues to increase to

≊5.0V. The voltage at each COMP pin,

and the PWM duty cycle, increase to the value required for regulation as determined by its feedback loop. The

time t1 in Figure 1 is calculated from:

(10)

With a 0.1 µF capacitor at SS, t1 is

≊3 ms.

If the Hiccup Mode Current Limit Restart circuit activates due to repeated current limit detections at CS1 and/or

CS2, both SS1 and SS2 are internally grounded (see the section on Hiccup Mode Current Limit Restart). After a

short propagation delay, the SS pins are released and the external SS pin capacitors are charged by internal 1

µA current sources. The slow charge rate provides a rest or dwell time for the converter power stage (t2 in

Figure 17), reducing the average input current and component temperature rise while in an overload condition.

When the voltage at the SS and COMP pins reach

≊1.5V, the first pulse out of either PWM comparator switches

the internal SS pin current sources to 50 µA. The voltages at the SS and COMP pins then increase more quickly,

increasing the duty cycle at the output drivers. The rest time t2 is the time required for SS to reach 1.5V:

(11)

With a 0.1 µF capacitor at SS, t2 is

≊150 ms.

Experimentation with the startup sequence and over-current restart condition is usually necessary to determine

the appropriate value for the SS capacitors.

To shutdown one regulator without affecting the other, ground the appropriate SS pin with an open collector or

open drain device as shown in Figure 27. The SS pin forces the COMP pin to ground which reduces the PWM

duty cycle to zero for that regulator. Releasing the SS pin allows normal operation to resume.

When the LM5032’s two controller channels are configured to provide a single high current output, SS1 and SS2

are typically connected together, requiring a single capacitor for the two pins.

22

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