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KAI-1010 датащи(PDF) 13 Page - ON Semiconductor

номер детали KAI-1010
подробное описание детали  Interline CCD Image Sensor
PDF  27 Pages
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производитель  ONSEMI [ON Semiconductor]
домашняя страница  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

KAI-1010 датащи(HTML) 13 Page - ON Semiconductor

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13
OPERATION
Table 10. ABSOLUTE MAXIMUM RATINGS
Rating
Description
Min.
Max.
Unit
Notes
Temperature
(@ 10%
±5%RH)
Operation Without Damage
−50
+70
°C
5, 6
Voltage
(Between Pins)
SUB−WELL
0
+40
V
1, 7
VRD, VDD, OG & VSS − WELL
0
+15
V
2
IDHA,B & VOUTA,B − WELL
0
+15
V
2
fV1 − fV2
−12
+20
V
2
fH1A, fH1B − fH2
−12
+15
V
2
fH1A, fH1B, fH2, FDG − fV2
−12
+15
V
2
fH2 − OG & VSS
−12
+15
V
2
fR – SUB
−20
0
V
1, 2, 4
All Clocks − WELL
−12
+15
V
2
Current
Output Bias Current (IOUT)
−
10
mA
3
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Under normal operating conditions the substrate voltage should be above +7 V, but may be pulsed to 40 V for electronic shuttering.
2. Care must be taken in handling so as not to create static discharge which may permanently damage the device.
3. Per Output. IOUT affects the band-width of the outputs.
4.
fR should never be more positive than VSUB.
5. The tolerance on all relative humidity values is provided due to limitations in measurement instrument accuracy.
6. The image sensor shall continue to function but not necessarily meet the specifications of this document while operating at the specified
conditions.
7. Refer to Application Note Using Interline CCD Image Sensors in High Intensity Visible Lighting Conditions.
Table 11. DC OPERATING CONDITIONS
Description
Symbol
Min.
Nom.
Max.
Unit
Pin Impedance (Note 6)
Notes
Reset Drain
VRD
8.5
9
9.5
V
5 pF, > 1.2 M
W
Reset Drain Current
IRD
−
0.2
−
mA
Output Amplifier Return & OG
VSS
−
0
−
V
30 pF, > 1.2 M
W
Output Amplifier Return Current
ISS
−
5
−
mA
Output Amplifier Supply
VDD
12
15.0
15.0
V
30 pF, > 1.2 M
W
Output Bias Current
IOUT
−
5
10
mA
5
P-Well
WELL
−
0.0
−
V
Common
1
Ground
GND
−
0.0
−
V
1
Fast Dump Gate
FDG
−7.0
−6.0
−5.5
V
20 pF, > 1.2 M
W
2
Substrate
SUB
7
VSUB
15
V
1 nF, > 1.2 M
W
3, 8
Input Diode A, B Horizontal CCD
IDHA,
IDHB
12.0
15.0
15.0
V
5 pF, > 1.2 M
W
4
1. The WELL and GND pins should be connected to P-Well ground.
2. The voltage level specified will disable the fast dump feature.
3. This pin may be pulsed to VES = 40 V for electronic shuttering
4. Electrical injection test pins. Connect to VDD power supply.
5. Per output. Note also that IOUT affects the bandwidth of the outputs.
6. Pins shown with impedances greater than 1.2 M
W are expected resistances. These pins are only verified to 1.2 MW.
7. The operating levels are for room temperature operation. Operation at other temperatures may or may not require adjustments of these
voltages.
8. Refer to Application Note Using Interline CCD Image Sensors in High Intensity Visible Lighting Conditions.



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