ML6518CS datasheet(6/8 Pages) MICRO-LINEAR

6 / 8 page

ML6518

Figure 2. Application Diagram Showing Typical SCSI Bus Configuration with the ML6518

As outlined in Annex G of the ANSI SCSI-3 Parallel

Interface Specification (X3T9.2/855D), “The SCSI bus

termination shall be external to the device being inserted

or removed.” In other words, any terminator connected to

a device being hot inserted/removed should be inactive

(accomplished by grounding the DISCNKT pin in the case

of the ML6518). If the terminator being inserted/removed

were in the active state, at some point in time the bus

would be terminated by either 1 or 3 terminators. In either

case, data integrity on the bus will be compromised.

Figure 2 gives an application diagram showing a typical

SCSI bus configuration. To ensure proper operation, the

TERMPWR pin must be connected to the SCSI

TERMPOWER line. Each ML6518 requires parallel 0.1µF

and 10µF capacitors connected between the VREF and

GND pins and the TERMPOWER line needs a 10µF

bypass capacitor at one node in the system.

In an 8-bit wide SCSI bus arrangement (“A” Cable),

a single ML6518 would be needed at each end of the SCSI

cable in order to terminate the 18 active signal lines.

16-bit wide SCSI would use one ML6518 and one

ML6599, while 32-bit wide SCSI bus would require two

ML6518s and one ML6599.

In a typical SCSI subsystem, the open collector driver in

the SCSI transceiver pulls low when asserted. The

termination resistance serves as the pull-up when negated.

Figure 2 also shows a typical cable response to a pulse.

The receiving end of the cable will exhibit a single time

delay. When negated, the initial step will reach an

intermediate level (VSTEP). With higher SCSI data rates,

sampling could occur during this step portion. In order to

get the most noise margin, the step needs to be as high as

possible to prevent false triggering. For this reason the

regulator voltage and the resistor defining the MOSFET

characteristic are trimmed to ensure that the IO is as close

as possible to the SCSI maximum current specification.

VSTEP is defined as:

VSTEP = VOL + (IO ¥ ZO)

where VOL is the driver output low voltage, IO is the

current from the receiving terminator, and ZO is the

characteristic impedance of the cable.

This is a very important characteristic that the terminator

helps to overcome by increasing the noise margin and

boosting the step as high as possible.

TERMPWR LINE

ML6518

TERMPWR

VREF

GND

L18

L2 L1

DISCNKT

0.1µF

10µF

TERMPWR

VREF

GND

L18

L1 L2

ML6518

DISCNKT

SCSI XCVR

VREG

VSTEP

VREG

LINE ASSERTED LINE NEGATED

10µF

0.1µF

10µF

. . .

VOL

SCSI CABLE

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