ML6430 datasheet(3/33 Pages) MICRO-LINEAR

3 / 33 page

ML6430/ML6431

NAME

FUNCTION

P2/SDATA

This is a dual function pin. If presets

are enabled, refer to Table 7. If presets

are disabled, serial bus data input.

P3/SCLK

This is a dual function pin. If presets

are enabled, refer to Table 7. If presets

are disabled, serial bus clock input.

SLEEP/54MHz

Hardware sleep mode: when low,

disables entire chip for ultra-low

power dissipation. Sleep mode can

also be enabled/disabled via serial bus

(Register 8). 54MHz is a clock input.

This can be any 4X clock up to

70MHz used for pulse generation.

4VCC S

Analog supply for sync separator.

GND S

Analog ground for sync separator.

6CVIN/HSYNC Composite video input; video input in

typical composite video applications,

or Y input for YUV applications, or G

input for RGB applications with sync

on green. For typical VGA or other

high performance display applica-

tions, this input may be supplied with

a TTL level HSYNC signal and the

vertical sync input supplied with a TTL

level VSYNC signal.

7CVREF

Reference voltage for internal sync

slicer. The external capacitor is driven

by a charge pump to follow the sync

tip.

8VSYNC

Vertical input for non-composite

sources. This input may be supplied

with a TTL level VSYNC signal. For

composite inputs this pin is tied high

or low.

9VCC A

Analog supply pin for analog PLL.

GND A

Analog ground for analog PLL.

XTALIN

Crystal may be parallel tuned 3.58

MHz or 4.43MHz, or may be driven

by an external oscillator at these

frequencies, or at 4x these

frequencies.

XTALOUT

Crystal drive pin. No connect if using

external oscillator or clock.

NAME

FUNCTION

FREERUN

Forces the PLL to run at a selected

standard without syncing to a video

signal. Accuracy is ±20ppm in

FREERUN with ideal crystal, otherwise

locked to video source

NOSIGNAL Indicates video signal activity has not

been detected at the composite input.

If NOSIGNAL = low, this condition

does not imply that lock has been

established. The NOSIGNAL pin can

be tied to FREERUN to create a local

loop in which the genlock will not try

to lock until a signal is detected at the

input.

LOCKED

Indicates when digital PLL is locked to

incoming video signal.

(ML6430) AUDIOCLK

Digital audio clock output.

Programmable for 32kHz, 44.1kHz or

48kHz output.

(ML6431) AUDIOCLK/PHERROUT

This is a dual mode pin. Pin is selected

via serial bus (Register 7). AUDIOCLK

is an audio clock signal (see Table 9).

PHERROUT indicates whether

incoming HSYNC is ahead or behind

output HSYNC.

FIELD ID

Field Flag: Odd = 1, Even = 0

2X CLOCK 2X oversampled PIXEL CLOCK &

Output of Digital PLL. Nominal

frequency of 27MHz

1X CLOCK/4X CLOCK

1X pixel clock. Nominal frequency

of 13.5MHz or 54MHz ±20ppm in

FREERUN with ideal crystal, otherwise

locked to video source. PAL 4X CLOCK

not available (no 4x4.4336MHz clock).

GND B

Digital ground for output driver

buffers.

VCC B

Digital supply for output driver buffers.

FRESET

Frame reset; active low for one half

line at the high to low transition of

field ID. In NTSC mode, FRESET goes

low on the high-to-low transition on

the Field ID pin and at the beginning

of line 1 (see Figure 2). In PAL mode,

FRESET goes low on the high-to-low

transition on the Field ID pin and at

the end of line 310 (see Figure 3).

PIN DESCRIPTION (NOTE: ML6430 and ML6431 pin functions are identical except for pin 16. See below)

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