ML4900

7

PROTECT

VDD

N DRV H

N DRV L

PWR GND

COMP

ISENSE

VFB

ML4900

R1

5m

Ω

1W

4X

1800

µF

10V

L2

1.4

µH

R3

330k

Ω

C9

33pF

C8

220nF

16V

D0

D1

D2

D3

SHDN

PWR GOOD

VREF

GND

3X

1800

µF

10V

C11

22

µF

25V

C10

220nF

16V

R4

1k

Ω

C12

220nF

16V

C13

1

µF

16V

R5

100k

Ω

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

D1

BAW56

OUTEN

UP#

VID0

VID1

VID2

VID3

PWRGD

C4

C5

C6

C7

C3

C1

C2

Q1

Q2

and GND pins. At the same time, PWR GND must have a

low impedance connection to the ground plane used on

the board, as high instantaneous currents will flow in PWR

GND when N DRV L and N DRV H switch the capacitive

loads of the output MOSFET gates. A layout technique

which satisfies these requirements is to return PWR GND

to the grounded end of R1 using a high current Kelvin

connection. Figure 2 shows one successful

implementation of these PCB layout requirements.

comparator. It is often helpful to shield the trace running

ground.

The compensation components R3 and C9 are high-

impedance nodes connected to the output of the voltage

loop error amplifier. These components should be kept in

close proximity to the ML4900. C9 should be returned to

GND, not to PWR GND or the ground plane of the PC

board. It may be helpful to shield the trace running from

R3 to COMP with a “guard trace” connected to circuit

ground.

Ensure that its ground connection is to GND, not PWR

GND or the ground plane of the PCB.

returned to PWR GND or to the PC board ground plane.

They should not be returned to GND due to high transient

currents which could interfere with the current sensing

function.

In order to reduce circuit size, complexity, and cost, direct

drive of all N-channel power MOSFETs in the output stage

is employed, derived from the 12V input bus. This delivers

performing the synchronous rectification function. The

power switching MOSFET(s), however, have a worst-case

logic-level parts.

If a given design uses power MOSFETs in an 8 pin SOIC

package style, keep in mind that the thermal dissipation

capability of these parts is largely dictated by the copper

area available to their drains. A good layout will maximize

this area.

Figure 2. Kelvin Sense Connections

SENSE

RESISTOR

TO

ISENSE

TO

GND

TO

PWR GND

POWER GROUND RETURN

(GROUND PLANE)

TO

SYNCHRONOUS

RECTIFIER

MOSFET

SOURCE

Figure 1. Pentium Pro VRM Circuit