ML4658

4

Power Supply Voltage Range

Input Voltage Range

Input Current

RRSET, RTSET, JAB, CLSN, XMT, RCV, LTF .......... 60mA

Output Current

TxTP+, TxTP– ...................................................... 80mA

Storage Temperature ................................ –65°C to 150°C

Lead Temperature (Soldering 10 sec.) ..................... 260°C

ELECTRICAL CHARACTERISTICS

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

140

mA

0.8

V

Transmit Peak Output Current

RTSET = 220

Ω

42

mA

(Note 6)

Transmit Squelch Voltage Level

(Tx+, Tx–)

–170

mV

Differential Input Voltage

(RxTP+, RxTP–)

±0.300

±3.1

V

Receiver Input Resistance

10

k

Ω

SQEN/LTD/JABD Input Resistance

12

k

Ω

Receive Squelch Voltage Level

(RxTP+, RxTP–)

300

450

585

mV-p

Differential Output Voltage

(Rx±, COL±)

±550

±1200

mV

Common Mode Output Voltage

(Rx±, COL±)

4.0

V

Differential Output Voltage Imbalance

(Rx±, COL±)

2

±40

mV

BIAS Voltage

3.2

V

SQEN/LTD/JABD

SQE TEST disabled

0.3

V

All disabled

1.1

1.4

Link Test Disabled

BIAS – 0.15

BIAS + 0.15

All Enabled

OPERATING CONDITIONS

LED on Current ....................................................... 10mA

RRSET ......................................................... 61.9K

Ω ±1%

RTSET ............................................................ 220

Ω ±1%

TxCAP .................................................................... 330pF

Note 1: Absolute maximum ratings are limits beyond which the life of the integrated circuit may be impaired. All voltages unless otherwise specified are measured with

respect to ground.

Note 2: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.

Note 4: This does not include the current from the AUI pull down resistors, the transmit pins TxTP+ and TxTP– or the LED output pins.

Note 5: LED drivers can sink up to 20mA, but VOL will be higher.

Note 6: This current will result in a 2.5V peak output voltage on unshielded twisted pair cable when connected through an external filter and transformer as shown in Figure 12.