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SM89516B датащи(PDF) 29 Page - SyncMOS Technologies,Inc |
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SM89516B датащи(HTML) 29 Page - SyncMOS Technologies,Inc |
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29 / 49 page ![]() SM89516B 8-Bit Micro-controller 64KB Flash & 1KB RAM embedded Specifications subject to change without notice contact your sales representatives for the most recent information. ISSFD-M087 Ver D SM89516B 08/07/2015 - 29 - 7. Timer 2 Timer2 is a 16-bit timer/counter which can operate as either an event timer or an event counter as selected by C/T2 in the special function register T2CON. Mnemonic Description Dir. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RST Timer 2 TL2 Timer 2 , low byte CCh TL2[7:0] 00h TH2 Timer 2 , high byte CDh TH2[7:0] 00h RCAP2L Reload and capture data low byte CAh RCAP2L[7:0] 00h RCAP2H Reload and capture data high byte CBh RCAP2H[7:0] 00h T2MOD Timer 2 Mode C9h - - - - - - T2OE DCEN 00h T2CON Timer 2 Control Register C8h TF2 EXF2 RCLK TCLK EXEN 2 TR2 C/ T2 CP/ RL2 00h Mnemonic: T2MOD Address: 98h 7 6 5 4 3 2 1 0 Reset - - - - - - T2OE DCEN 00H T2OE: Timer 2 Output Enable bit. It enables Timer 2 overflow rate to toggle P1.0. DCEN: Down Count Enable bit. When set, this allows Timer 2 to be configured as an up/down Counter. Mnemonic: T2CON Address: 98h 7 6 5 4 3 2 1 0 Reset TF2 EXF2 RCLK TCLK EXEN2 TR2 C/ T2 CP/ RL2 00H TF2: Timer 2 overflow flag is set by a Timer 2 overflow and must be cleared by software. TF2 will not be set when either RCLK = 1 or TCLK = 1. EXF2: Timer 2 external flag is set when either a capture or reload is caused by a negative transition on T2EX and EXEN2 = 1. When Timer 2 interrupt is enabled, EXF2 = 1 will cause the CPU to vector to the Timer 2 interrupt routine. EXF2 must be cleared by software. EXF2 does not cause an interrupt in up/down counter mode (DCEN = 1). RCLK: Receive clock enable. When set, causes the serial port to use Timer 2 overflow pluses for it’s receive clock in serial port Modes 1 and 3. RCLK = 0 causes Timer 1 overflows to be used for the receive clock. TCLK: Transmit clock enable. When set, causes the serial port to use Timer 2 overflow pulses for it’s transmit clock in serial port Modes 1 and 3. TCLK = 0 causes Timer 1 overflows to be used for the transmit clock. |
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