PIC876 datasheet(177/218 Pages) MICROCHIP

177 / 218 page

 2001 Microchip Technology Inc.

DS30292C-page 175

PIC16F87X

FIGURE 15-21:

A/D CONVERSION TIMING

TABLE 15-13: A/D CONVERSION REQUIREMENTS

131

130

132

BSF ADCON0, GO

A/D CLK

A/D DATA

ADRES

ADIF

SAMPLE

OLD_DATA

SAMPLING STOPPED

DONE

NEW_DATA

(TOSC/2)(1)

Note: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP

instruction to be executed.

1 TCY

. . .

Param

No.

Sym

Characteristic

Min

Typ†

Max

Units

Conditions

130

TAD

A/D clock period

Standard(F)1.6

——

µsTOSC based, VREF ≥ 3.0V

Extended(LF)3.0

——

µsTOSC based, VREF ≥ 2.0V

Standard(F)

2.0

4.0

6.0

µs

A/D RC mode

Extended(LF)

3.0

6.0

9.0

µs

A/D RC mode

131

TCNV Conversion time (not including S/H time)

(Note 1)

—

TAD

132

TACQ Acquisition time

(Note 2)

10*

—

µs

The minimum time is the

amplifier settling time. This may

be used if the "new" input volt-

age has not changed by more

than 1 LSb (i.e., 20.0 mV @

5.12V) from the last sampled

voltage (as stated on CHOLD).

134

TGO

Q4 to A/D clock start

—

TOSC/2 §—

—

If the A/D clock source is

selected as RC, a time of TCY is

added before the A/D clock

starts. This allows the SLEEP

instruction to be executed.

These parameters are characterized but not tested.

†

Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are

not tested.

This specification ensured by design.

Note 1: ADRES register may be read on the following TCY cycle.

2: See Section 11.1 for minimum conditions.

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