PIC876 datasheet(92/218 Pages) MICROCHIP

92 / 218 page

PIC16F87X

DS30292C-page 90

 2001 Microchip Technology Inc.

9.2.18.1

Bus Collision During a START

Condition

During a START condition, a bus collision occurs if:

SDA or SCL are sampled low at the beginning of

the START condition (Figure 9-20).

SCL is sampled low before SDA is asserted low

(Figure 9-21).

During a START condition, both the SDA and the SCL

pins are monitored. If either the SDA pin or the SCL pin

is already low, then these events all occur:

• the START condition is aborted,

• and the BCLIF flag is set,

• and the SSP module is reset to its IDLE state

(Figure 9-20).

The START condition begins with the SDA and SCL

pins de-asserted. When the SDA pin is sampled high,

the baud rate generator is loaded from SSPADD<6:0>

and counts down to 0. If the SCL pin is sampled low

while SDA is high, a bus collision occurs, because it is

assumed that another master is attempting to drive a

data '1' during the START condition.

If the SDA pin is sampled low during this count, the

BRG is reset and the SDA line is asserted early

(Figure 9-22). If, however, a '1' is sampled on the SDA

pin, the SDA pin is asserted low at the end of the BRG

count. The baud rate generator is then reloaded and

counts down to 0. During this time, if the SCL pins are

sampled as '0', a bus collision does not occur. At the

end of the BRG count, the SCL pin is asserted low.

FIGURE 9-20:

BUS COLLISION DURING START CONDITION (SDA ONLY)

Note:

The reason that bus collision is not a factor

during a START condition is that no two

bus masters can assert a START condition

at the exact same time. Therefore, one

master will always assert SDA before the

other. This condition does not cause a bus

collision, because the two masters must be

allowed to arbitrate the first address follow-

ing the START condition. If the address is

the same, arbitration must be allowed to

continue into the data portion, Repeated

START, or STOP conditions.

SDA

SCL

SEN

SDA sampled low before

SDA goes low before the SEN bit is set.

S bit and SSPIF set because

SSP module reset into IDLE state.

SEN cleared automatically because of bus collision.

S bit and SSPIF set because

Set SEN, enable START

condition if SDA = 1, SCL = 1

SDA = 0, SCL = 1.

BCLIF

SSPIF

SDA = 0, SCL = 1.

SSPIF and BCLIF are

cleared in software

SSPIF and BCLIF are

cleared in software

Set BCLIF,

Set BCLIF.

START condition.

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