PIC16F628-20SLASHP datasheet(69/160 Pages) MICROCHIP

69 / 160 page

Preliminary

DS40300B-page 69

PIC16F62X

11.0

VOLTAGE REFERENCE

MODULE

The Voltage Reference is a 16-tap resistor ladder

network that provides a selectable voltage reference.

The resistor ladder is segmented to provide two ranges

of VREF values and has a power-down function to

conserve power when the reference is not being used.

The VRCON register controls the operation of the

reference as shown in Figure 11-1. The block diagram

is given in Figure 11-2.

11.1

Configuring the Voltage Reference

The Voltage Reference can output 16 distinct voltage

levels for each range.

The equations used to calculate the output of the

Voltage Reference are as follows:

if VRR = 1: VREF = (VR<3:0>/24) x VDD

if VRR = 0: VREF = (VDD x 1/4) + (VR<3:0>/32) x VDD

The setting time of the Voltage Reference must be

considered

when

changing

the

VREF

output

(Table 12-2). Example 11-1 shows an example of how

to configure the Voltage Reference for an output volt-

age of 1.25V with VDD = 5.0V.

FIGURE 11-1:

VRCON REGISTER(ADDRESS 9Fh)

FIGURE 11-2: VOLTAGE REFERENCE BLOCK DIAGRAM

R/W-0

U-0

R/W-0

VREN

VROE

VRR

—VR3

VR2

VR1

VR0

R = Readable bit

W = Writable bit

U = Unimplemented bit, read

as ’0’

-n = Value at POR reset

bit7

bit0

bit 7:

VREN: VREF Enable

= VREF circuit powered on

= VREF circuit powered down, no IDD drain

bit 6:

VROE: VREF Output Enable

= VREF is output on RA2 pin

= VREF is disconnected from RA2 pin

bit 5:

VRR: VREF Range selection

= Low Range

= High Range

bit 4:

Unimplemented: Read as '0'

bit 3-0: VR<3:0>: VREF value selection 0

≤ VR [3:0] ≤ 15

when VRR = 1: VREF = (VR<3:0>/ 24) * VDD

when VRR = 0: VREF = 1/4 * VDD + (VR<3:0>/ 32) * VDD

Note:

R is defined in Table 12-3.

VRR

VR3

VR0

(From VRCON<3:0>)

16-1 Analog Mux

VREN

VREF

16 Stages

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