TLE8250GVIO

Application Information

Data Sheet

21

Rev. 1.1, 2014-10-08

8.2

Output Characteristics of the RxD Pin

The RxD output pin is designed as a push-pull output stage (see Figure 1), meaning to produce a logical “Low”

signal the TLE8250GVIO switches the RxD output to GND. Vice versa to produce a logical “High” signal the

TLE8250GVIO switches the RxD output to

V

The level

V

therefore on the RxD output current

I

supply

V

5.5 V. At a

V

for a

V

Similar to the logical “High” signal, the level

V

input current

I

flowing into the RxD output pin.

Currents flowing into the device are marked positive inside the data sheet and currents flowing out of the device

TLE8250GVIO are marked negative inside the data sheet (see Table 6).

The diagram in Figure 11 shows the output current capability of the RxD output pin depended on the chip

temperature

T

at a

V

Both diagrams show the output current for a logical “High” level

V

TLE8250GVIO provides a logical “High” signal on the RxD output while the signal on the CAN bus is “Recessive”

(see Figure 3):

•

The curve “

V

at the RxD output pin of the TLE8250GVIO (see Figure 11).

For this graph

V

•The curve “

V

maximum value of the output current at the RxD output pin (see Figure 11).

For this graph

V

•The curve “

V

minimum value of the output current at the RxD output pin (see Figure 11).

For this graph

V

•

The curve “

V

at the RxD output pin of the TLE8250GVIO (see Figure 12).

For this graph

V

•The curve “

V

maximum value of the output current at the RxD output pin (see Figure 12).

For this graph

V

•The curve “

V

minimum value of the output current at the RxD output pin (see Figure 12).

For this graph

V

The diagram in Figure 13 and the diagram in Figure 14 show the current capability of the RxD output pin

depended on the chip temperature

T

supply of 5.0 V and Figure 14 shows the current capability of the RxD output pin at a

V

Both diagrams show the output current for a logical “Low” level

V

TLE8250GVIO provides a logical “Low” signal on the RxD output while the signal on the CAN bus is “Dominant”

(see Figure 3):

•

The curve “

V

at the RxD output pin of the TLE8250GVIO (see Figure 13).

For this graph

V