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TAS2553 датащи(PDF) 34 Page - Texas Instruments

номер детали TAS2553
подробное описание детали  TAS2553 2.8-W Class-D Mono Audio Amplifier with Class-G Boost and Speaker Sense
PDF  58 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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TAS2553 датащи(HTML) 34 Page - Texas Instruments

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TAS2553
SLAS978B – SEPTEMBER 2013 – REVISED FEBRUARY 2014
www.ti.com
7.5.7 Register 0x05: Serial Interface Control Register 1
BIT
NAME
READ/WRITE
DEFAULT
DESCRIPTION
7
WCLKDIR
R/W
0
WCLK Direction
0 = WCLK is an input terminal
1 = WCLK is an output terminal
6
BCLKDIR
R/W
0
BCLK Direction
0 = BCLK is an input terminal
1 = BCLK is an output terminal
5-4
CLKSPERFRAME
R/W
00
Clocks per Frame
00 = 32 clocks
01 = 64 clocks
10 = 128 clocks
11 = 256 clocks
3-2
DATAFORMAT
R/W
00
Data Format
00 = I2S format
01 = DSP (PCM format)
10 = Right justified format (RJF)
11 = Left justified format (LJF)
1-0
WORDLENGTH
R/W
00
Word Length
00 = 16 bits
01 = 20 bits
10 = 24 bits
11 = 32 bits
7.5.8 Register 0x06: Serial Interface Control Register 2
This register sets the clock cycle offset between the WCLK edge to the MSB of serial interface patterns. This is
useful for TDM mode where multiple devices share DIN or DOUT lines.
READ /
BIT
NAME
DEFAULT
DESCRIPTION
WRITE
7-0
I2S_SHIFT_REG
R/W
0000 0000
Offset from WCLK to MSB in serial interface patterns.
0000 0000 = 0 bit offset
0000 0001 = 1 bit offset
….
1111 1111 = 255 bit offset
34
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Product Folder Links: TAS2553



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