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LMP7732MA/NOPB датащи(PDF) 16 Page - Texas Instruments |
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LMP7732MA/NOPB датащи(HTML) 16 Page - Texas Instruments |
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16 / 26 page ![]() - + ½ LMP7732 - + ½ LMP7732 0.1 PF 100 k: 10: 2 k: 4.7 PF 24.3 k: 100 k: 0.1 PF 4.3 k: 2.2 PF 22 PF 110 k: SCOPE x 1 RIN = 1M VOLTAGE GAIN = 50,000 LMP7732 SNOSAZ0E – AUGUST 2007 – REVISED MARCH 2013 www.ti.com INPUT VOLTAGE NOISE MEASUREMENT The LMP7732 has very low input voltage noise. The peak-to-peak input voltage noise of the LMP7732 can be measured using the test circuit shown in Figure 42. Figure 42. 0.1 Hz to 10 Hz Noise Test Circuit The frequency response of this noise test circuit at the 0.1 Hz corner is defined by only one zero. The test time for the 0.1 Hz to 10 Hz noise measurement using this configuration should not exceed 10 seconds, as this time limit acts as an additional zero to reduce or eliminate the contributions of noise from frequencies below 0.1 Hz. Figure 43 shows typical peak-to-peak noise for the LMP7732 measured with the circuit in Figure 42. Figure 43. 0.1 Hz to 10 Hz Input Voltage Noise Measuring the very low peak-to-peak noise performance of the LMP7732, requires special testing attention. In order to achieve accurate results, the device should be warmed up for at least five minutes. This is so that the input offset voltage of the op amp settles to a value. During this warm up period, the offset can typically change by a few µV because the chip temperature increases by about 30°C. If the 10 seconds of the measurement is selected to include this warm up time, some of this temperature change might show up as the measured noise. Figure 44 shows the start-up drift of five typical LMP7732 units. 16 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMP7732 |
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