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TPL0102-100QPWREP датащи(PDF) 13 Page - Texas Instruments |
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TPL0102-100QPWREP датащи(HTML) 13 Page - Texas Instruments |
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13 / 36 page ![]() Start Address (1010 _ _ _) 0 Ack Register Addr Ack Start Address (1010_ _ _) 0 Ack Register Addr Ack reStart Address (1010_ _ _) 1 Ack First Read Data Byte Ack I 2C Write to A Register I 2C Read From A Register From Processor to DPOT From DPOT to Processor Data1 Ack Stop Last Read Data Byte noAck Stop Ack Ack DataN TPL0102-EP www.ti.com SLIS149 – JUNE 2014 8.3 Feature Description Table 1. Summary of Features Feature TPL0102-EP Number of potentiometers 2 Digital interface I2C Steps 256 Wiper memory Non-volatile Taper Linear End-to-end resistance 100 k Ω End-to-end resistance tolerance 20% Wiper resistance 25 Ω (typ) 8.3.1 Potentiometer Pin Description 8.3.1.1 HA, HB, LA, LB The high (HA, HB) and low (LA, LB) pins of the TPL0102-EP are equivalent to the fixed pins of a mechanical potentiometer. The H and L pins do not have any polarity restrictions, i.e. H can be at a higher voltage than L, or L can be at a higher voltage than H. The WA and WB pins are the wipers and equivalent to the movable pin of a mechanical potentiometer. The position of the wiper is set using the WR register. With the WR register set to 255 decimal, the wiper is closest to the H pin, and with the WR register set to 0, the wiper is closest to the L pin. 8.3.1.2 SDA, SCL SDA is a bi-directional serial data input/output pin for I2C communication. SDA is an open drain output and requires an external pull-up resistor. SCL is the serial clock input for I2C communication. SCL requires an external pull-up resistor. 8.3.1.3 A0, A1, A2 These inputs are used to set the last three bits of the I2C address of the device. By using different values for A0, A1, A2, up to eight TPL0102-EP devices can be used on the same I2C bus. Figure 13. I2C Interface Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 13 |
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