Autocorrelating Signal Processor

3

MX102

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1. Block Diagram

SIGNAL

IN

SIGNAL

BIAS

AUTOCORRELATION

PROCESS

OUTPUT

[4

x

SIGNAL

IN]

Output

CLOCKS

XTAL

V

DD

V

SS

XTAL/CLOCK

GENERATOR/

DIVIDER

-

+

DELAY

48-BIT

COMPARE

LOGIC

DELAY

48-BIT

INTERPOLATE

INTERPOLATE

OUTPUT

LOGIC

DELAY

24-BIT

COMPARE

LOGIC

DELAY

24-BIT

XTAL/CLOCK

CLOCK

6

BUFCLK

Figure 1: Device Block Diagram