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MAX6740XKL датащи(PDF) 13 Page - Maxim Integrated Products

номер детали MAX6740XKL
подробное описание детали  Low-Power Dual-/Triple-Voltage SC70 UP Supervisory Circuits
PDF  16 Pages
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производитель  MAXIM [Maxim Integrated Products]
домашняя страница  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX6740XKL датащи(HTML) 13 Page - Maxim Integrated Products

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Low-Power Dual-/Triple-Voltage SC70 µP
Supervisory Circuits
______________________________________________________________________________________
13
Functional Diagram
VCC1
VCC2
RSTIN/PFI
VCC1
VCC1
VCC1
RESET
TIMEOUT
PERIOD
VCC2
POK1
RESET
RESET
OUTPUT
0.488V
1.23V
MR
PULLUP
MR
MAX6736–
MAX6745
PFO
DELAY
The MAX6741/MAX6744 offer a VCC1 POK (POK1) ideal
for VCC1-to-VCC2 sequencing. POK1 remains low as
long as VCC1 is below its VTH1 threshold. When VCC1
exceeds VTH1 for the POK1 timeout period (tPOKP), the
open-drain POK1 output is deasserted. The POK1 output
can then enable the VCC2 power supply (use an external
POK1 pullup resistor).
RESET is deasserted when both
VCC1 and VCC2 remain above their selected thresholds
for the reset timeout period (tRP). The POK1 output can
be used for I/O before core or core before I/O sequenc-
ing, depending on the selected VCC1/VCC2 thresholds.
See the Typical Application Circuit and Figure 1.
Monitoring a Negative Voltage
The power-fail comparator can be used to monitor a
negative supply voltage using the circuit shown in
Figure 4. When the negative supply is valid,
PFO is low.
When the negative supply voltage drops,
PFO goes
high. The circuit’s accuracy is affected by the PFI
threshold tolerance, VCC, R1, and R2.
Transient Immunity
The MAX6736–MAX6745 supervisors are relatively
immune to short-duration falling VCC transients (glitch-
es). It is usually undesirable to reset the µP when VCC
experiences only small glitches. The Typical Operating
Characteristics show Maximum VCC1/VCC2 Transient
Duration vs. Reset Threshold Overdrive, for which reset
pulses are not generated. The graph shows the maxi-
mum pulse width that a falling VCC transient might typi-
cally have without causing a reset pulse to be issued.
As the amplitude of the transient increases, the maxi-
mum allowable pulse width decreases. A 0.1µF bypass
capacitor mounted close to the VCC pin provides addi-
tional transient immunity.
Chip Information
TRANSISTOR COUNT: 249
PROCESS: BiCMOS



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