12-Bit Low-Power, 2-Wire, Serial

Voltage-Output DAC

_______________________________________________________________________________________

3

Note 2: Static specifications are tested with the output unloaded.

Note 3: Linearity is guaranteed from codes 115 to 3981.

Note 4: Offset and gain error limit the FSR.

Note 5: Guaranteed by design. Not production tested.

ELECTRICAL CHARACTERISTICS (continued)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Digital Feedthrough

0.2

nV-s

Digital-to-Analog Glitch Impulse

Major carry transition, code = 7FF hex to 800

hex and 800 hex to 7FF hex

12

nV-s

POWER SUPPLIES

Supply Voltage Range

2.7

5.5

V

100

170

Supply Current with No Load

130

190

µA

Power-Down Supply Current

0.3

1

µA

TIMING CHARACTERISTICS (Figure 1)

Serial Clock Frequency

0

400

kHz

Bus Free Time Between STOP

and START Conditions

1.3

µs

START Condition Hold Time

0.6

µs

SCL Pulse Width Low

1.3

µs

SCL Pulse Width High

0.6

µs

Repeated START Setup Time

0.6

µs

Data Hold Time

00.9

µs

Data Setup Time

100

ns

SDA and SCL Receiving

Rise Time

(Note 5)

0

300

ns

SDA and SCL Receiving

Fall Time

(Note 5)

0

300

ns

SDA Transmitting Fall Time

(Note 5)

20 +

250

ns

STOP Condition Setup Time

0.6

µs

Bus Capacitance

(Note 5)

400

pF

Maximum Duration of

Suppressed Pulse Widths

050

ns