MAX5251 datasheet(4/16 Pages) MAXIM

номер детали	MAX5251

подробное описание детали	3V, Quad, 10-Bit Voltage-Output DAC with Serial Interface

PDF	16 Pages

Scroll/Zoom	100%

производитель	MAXIM [Maxim Integrated Products]

домашняя страница	https://www.maximintegrated.com/en.html

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4 / 16 page

-4

-8

-12

-16

-20

500k

1.0M 1.5M

2.0M

2.5M 3.0M

REFERENCE VOLTAGE INPUT

FREQUENCY RESPONSE

FREQUENCY (Hz)

REFAB SWEPT 0.67Vp-p

RL = 5kΩ

CL = 100pF

-1.25

0.5

1.0

1.5

2.0

REFERENCE VOLTAGE (V)

2.5

0.25

-0.25

-0.50

-0.75

-1.00

INTEGRAL NONLINEARITY

vs. REFERENCE VOLTAGE

RL = 5kΩ

1000

950

900

850

800

750

700

650

600

550

500

-55 -40 -20

20 40

120

100

SUPPLY CURRENT

vs. TEMPERATURE

TEMPERATURE (°C)

CODE = FFC hex

__________________________________________Typical Operating Characteristics

(VDD = +3.3V, TA = +25°C, unless otherwise noted.)

+3V, Quad, 10-Bit Voltage-Output DAC

with Serial Interface

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD = +3.0V to +3.6V, AGND = DGND = 0V, REFAB = REFCD = 1.25V, RL = 5kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise

noted. Typical values are at TA = +25°C. Output buffer connected in unity-gain configuration (Figure 9).)

CONDITIONS

tD02

SCLK Fall to DOUT Valid

Propagation Delay

tD01

SCLK Rise to DOUT Valid

Propagation Delay

100

tCP

SCLK Clock Period

tDH

DIN Hold Time

tDS

DIN Setup Time

tCSH

SCLK Rise to

CS Rise Hold Time

tCSS

CS Fall to SCLK Rise Setup Time

tCH

SCLK Pulse Width High

tCL

SCLK Pulse Width Low

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

100

tCSW

CS Pulse Width High

tCS1

CS Rise to SCLK Rise Hold Time

tCS0

SCLK Rise to

CS Fall Delay

CL = 200pF

120

100

tCP

SCLK Clock Period

TIMING CHARACTERISTICS (Figure 6)

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