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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MAX500AMLP датащи(PDF) 3 Page - Maxim Integrated Products |
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MAX500AMLP датащи(HTML) 3 Page - Maxim Integrated Products |
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3 / 12 page  CMOS, Quad, Serial-Interface 8-Bit DAC _______________________________________________________________________________________ 3 ELECTRICAL CHARACTERISTICS—Dual Supplies (continued) (VDD = +11.4V to +16.5V, VSS = -5V ±10%, AGND = DGND = 0V, VREF = +2V to (VDD - 4V), TA = TMIN to TMAX, unless otherwise noted.) Outputs unloaded VOUT = 10V Outputs unloaded (Note 5) (Note 5) TA = +25°C (Note 2) To ±1/2LSB, VREF = 10V, VDD = +15V, 2k Ω in parallel with 100pF load (Note 2) For specified performance CONDITIONS ns 150 tLDS LOAD Delay from SCL ns 150 tLDW LOAD Pulse Width ns 350 t2 SCL Low Time ns 350 t1 SCL High Time ns 150 tS1 SDA Valid to SCL Setup ns 150 tS1 SDA Valid to SCL Setup mA -10 ISS Negative Supply Current -9 mA 12 IDD Positive Supply Current 10 V 11.4 16.5 VDD Positive Supply Voltage k Ω 2 Output Load Resistance nV-s 50 Digital Crosstalk nV-s 50 Digital Feedthrough 38 Voltage Output Slew Rate µs 2.5 4.5 VOUT Settling Time UNITS MIN TYP MAX SYMBOL PARAMETER LDAC Pulse Width tLDAC 150 ns SRO Output Delay tD1 CLOAD = 50pF 150 ns SCL High Time t1 350 ns SDA Valid to SCL Hold tH 0 ns LDAC Pulse Width tLDAC 150 ns SCL Valid to SDA Setup tS1 Start condition 150 ns SDA Valid to SCL Setup tS2 Stop condition 100 ns TA = +25°C TA = +25°C V/µs SDA Valid to Rising SCL tS3 125 ns SRO Output Delay tD1 CLOAD = 50pF 150 ns SCL High Time t1 350 ns SCL Fall Time (Note 7) 50 µs SCL Rise Time (Note 7) 50 µs SCL Low Time t2 350 ns TA = TMIN to TMAX TA = TMIN to TMAX For specified performance V 11.4 16.5 VDD Positive Supply Voltage (Note 7) µs 50 SCL Rise Time (Note 7) µs 50 SCL Fall Time ns 0 tH SDA Valid to SCL Hold DYNAMIC PERFORMANCE POWER SUPPLIES SWITCHING CHARACTERISTICS (TA = +25°C, Note 6) 3-Wire Mode 2-Wire Mode |
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