High-Speed, Single-Supply,

Quad, SPST Analog Switches

_______________________________________________________________________________________

7

GND

NC_ OR

NO_

V-

V+

IN

OFF

ON

OFF

Q = (

COM_

IN DEPENDS ON SWITCH CONFIGURATION;

INPUT POLARITY DETERMINED BY SENSE OF SWITCH.

OFF

ON

OFF

IN

V+

IN_

MAX4591

MAX4593

MAX4593

Figure 4. Charge Injection

tr < 20ns

tf < 20ns

50%

0

LOGIC

INPUT

V-

300

Ω

NO_

OR NC_

GND

(

)

SWITCH

INPUT

IN_

+5V

0

COM_

SWITCH

OUTPUT

SWITCH

OUTPUT

LOGIC

INPUT

LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES

THAT HAVE THE OPPOSITE LOGIC SENSE.

V+

35pF

V+

MAX4591

MAX4592

MAX4593

50%

+5V

0

0

LOGIC

INPUT

SWITCH

OUTPUT 2

0

LOGIC

INPUT

V-

GND

COM_

IN_

COM_

V+

V+

Ω

NO_

NC_

SWITCH

OUTPUT 1

MAX4593

Figure 2. Switching Time

Figure 3. Break-Before-Make Interval (MAX4593 Only)

Test Circuits/Timing Diagrams