9DBU0731 datasheet(7/17 Pages) ICST

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REVISION C 04/22/15

7 O/P 1.5V PCIE GEN1-2-3 FAN-OUT BUFFER

9DBU0731 DATASHEET

Electrical Characteristics–DIF Low-Power HCSL Outputs

Electrical Characteristics–Current Consumption

TA = TAMB; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS NOTES

dV/dt

Scope averaging on, fast setting

1.4

2.3

3.5

V/ns

1,2,3

dV/dt

Scope averaging on, slow setting

0.9

1.5

2.5

V/ns

1,2,3

Slew rate matching

ΔdV/dt

Slew rate matching, Scope averaging on

9.3

1,2,4

Voltage High

VHIGH

630

750

850

Voltage Low

VLOW

-150

150

Max Voltage

Vmax

763

1150

Min Voltage

Vmin

-300

Vswing

Scope averaging off

300

1448

1,2

Crossing Voltage (abs)

Vcross_abs

Scope averaging off

250

390

550

1,5

Crossing Voltage (var)

Δ-Vcross

Scope averaging off

140

1,6

2 Measured from differential waveform

7 At default SMBus settings.

Slew rate

Statistical measurement on single-ended signal

using oscilloscope math function. (Scope

averaging on)

Measurement on single ended signal using

absolute value. (Scope averaging off)

1Guaranteed by design and characterization, not 100% tested in production.

3 Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around

differential 0V.

4 Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on

the average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the

oscilloscope is to use for the edge rate calculations.

5 Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising

edge (i.e. Clock rising and Clock# falling).

6 The total variation of all Vcross measurements in any particular system. Note that this is a subset of Vcross_min/max (Vcross

absolute) allowed. The intent is to limit Vcross induced modulation by setting

Δ-Vcross to be smaller than Vcross absolute.

TA = TAMB; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

NOTES

IDDA

VDDA+VDDR, @100MHz

2.2

IDD

VDD, All outputs active @100MHz

3.6

IDDIO

VDDIO, All outputs active @100MHz

IDDAPD

VDDA+VDDR, CKPWRGD_PD#=0

0.4

IDDPD

VDDx, CKPWRGD_PD#=0

0.25

0.6

IDDIOPD

VDDIO, CKPWRGD_PD#=0

0.0006

0.1

1 Guaranteed by design and characterization, not 100% tested in production.

2 Input clock stopped.

Operating Supply Current

Powerdown Current

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