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74LV4053 датащи(PDF) 13 Page - NXP Semiconductors |
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74LV4053 датащи(HTML) 13 Page - NXP Semiconductors |
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13 / 27 page ![]() 74LV4053 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 5 — 18 September 2014 13 of 27 NXP Semiconductors 74LV4053 Triple single-pole double-throw analog switch 10.1 Waveforms Measurement points are given in Table 9. VOL and VOH are typical voltage output levels that occur with the output load. Fig 13. nYn, nZ to nZ, nYn propagation delays 001aak351 nYn or nZ input nZ or nYn output tPLH tPHL VCC VEE VM VM VO VEE Measurement points are given in Table 9. VOL and VOH are typical voltage output levels that occur with the output load. Fig 14. Enable and disable times 001aak352 tPLZ tPHZ switch OFF switch ON switch ON nYn or nZ output LOW-to-OFF OFF-to-LOW nYn or nZ output HIGH-to-OFF OFF-to-HIGH Sn, E input VO VO VEE VEE VCC VSS VM tPZL tPZH 90 % 90 % 10 % 10 % Table 9. Measurement points Supply voltage Input Output VCC VM VM VX VY < 2.7 V 0.5VCC 0.5VCC VOL + 0.1VCC VOH 0.1VCC 2.7 V to 3.6 V 1.5 V 1.5 V VOL + 0.3 V VOH 0.3 V > 3.6 V 0.5VCC 0.5VCC VOL + 0.1VCC VOH 0.1VCC |
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