Compact, High-Efficiency, Dual-Output

Step-Up and LCD Bias DC-DC Converter

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3

CONDITIONS

N-channel

0.22

0.5

Ω

P-channel

0.4

1.0

LX Current Limit

N-channel PWM mode

550

670

800

mA

UNITS

MIN

TYP

MAX

PARAMETER

N-channel PFM mode

250

350

450

P-Channel Synchronous Rectifier

Turn-Off Current in PFM Mode

40

90

140

mA

Internal Oscillator

f

CLK/SEL = OUT

240

300

360

kHz

Oscillator Maximum Duty Cycle

D

80

85

90

%

External Clock Frequency

Range

200

400

kHz

LOGIC AND CONTROL

ON Input Threshold

LCDON, LCDPOL, CLK/SEL

Input Threshold

V

LBI Falling Threshold

599

614

629

mV

LBI Hysteresis

1

%

LBO Output Low Voltage

Sink current = 1mA

0.1

V

LBI Input Bias Current

50

nA

LBO Leakage Current

1

µA

LCDLX Voltage

28

V

LCDPOL connected to OUT or GND through

50k

Ω

150

225

300

mA

LCDLX Switch Resistance

1.0

1.4

Ω

LCDLX Leakage Current

1

µA

LCDFB Set Point

Positive LCD, LCDPOL = OUT

1.225

1.25

1.275

V

Negative LCD, LCDPOL = GND

-15

0

15

mV

LCDFB Input Bias Current

50

nA

LCD Line Regulation

Figure 2

0.1

%/V

LCD Load Regulation

Figure 2

0.5

%

Maximum LCDLX On-Time

3.4

4.3

5.2

µs

V

ELECTRICAL CHARACTERISTICS (continued)

LX On-Resistance

SYMBOL

LCDPOL = OUT or GND

300

350

450

LCDLX Switch Current Limit

Input Leakage Current

ON, LCDON, LCDPOL, CLK/SEL

1

µA

Minimum LCDLX Off-Time

Operating mode

0.8

1

1.2

µs

Start-up mode (positive or negative)

3.0

4.0

5.0

LCDFB Voltage for

Start-Up Mode

LCDPOL = OUT

0.75

V

LCDPOL = GND

0.5

LOGIC AND CONTROL INPUTS

LCD BIAS DC-DC