+2.7V to +5.25V, Low-Power, 8-Channel,

Serial 10-Bit ADCs

16

______________________________________________________________________________________

Table 6. Hard-Wired Power-Down

and Internal Clock Frequency

PD1

PD0

DEVICE MODE

0

0

Full Power-Down

0

1

Fast Power-Down

1

0

Internal Clock

1

1

External Clock

Table 5. Software Power-Down

and Clock Mode

Figure 13. Average Supply Current vs. Conversion Rate with

External Reference

1000

10,000

0.1

0.1

AVERAGE SUPPLY CURRENT

vs. CONVERSION RATE

WITH EXTERNAL REFERENCE

100

10

1

CONVERSION RATE (Hz)

1

100

10

1k

10k

1M

100k

CODE = 1010101000

1 CHANNEL

8 CHANNELS

Figure 14a. MAX149 Supply Current vs. Conversion Rate,

FULLPD

100

1

0.01

0.1

1

AVERAGE SUPPLY CURRENT

vs. CONVERSION RATE

(USING FULLPD)

10

CONVERSION RATE (Hz)

100

10

1k

CODE = 1010101000

8 CHANNELS

1 CHANNEL

POWER-DOWN

POWERED UP

POWERED UP

DATA VALID

DATA VALID

INTERNAL

S X X X X X 1 0

S

0 0

X

X

X

X

X

S

MODE

DOUT

DIN

CLOCK

MODE

SETS INTERNAL

CLOCK MODE

SETS

POWER-DOWN

CONVERSION

CONVERSION

SSTRB

Figure 12b. Timing Diagram Power-Down Modes, Internal Clock

N/A

N/A

Power-Down

0

1.8MHz

External

Enabled

Floating

225kHz

Internal

Enabled

1

INTERNAL

CLOCK

FREQUENCY

REFERENCE-

BUFFER

COMPENSATION

DEVICE

MODE

SHDN

STATE