LMU112PC25 datasheet(1/6 Pages) LODEV

номер детали	LMU112PC25

подробное описание детали	12 x 12-bit Parallel Multiplier

PDF	6 Pages

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производитель	LODEV [LOGIC Devices Incorporated]

домашняя страница	http://www.logicdevices.com

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DEVICES INCORPORATED

LMU112

12 x 12-bit Parallel Multiplier

Multipliers

08/16/2000–LDS.112-K

1

u

u 25 ns Worst-Case Multiply Time

u

u Low Power CMOS Technology

u

u Replaces Fairchild MPY112K

u

u Two’s Complement or Unsigned

Operands

u

u Three-State Outputs

u

u Package Styles Available:

• 48-pin PDIP

• 52-pin PLCC, J-Lead

FEATURES

DESCRIPTION

LMU112

12 x 12-bit Parallel Multiplier

DEVICES INCORPORATED

The LMU112 is a high-speed, low

power 12-bit parallel multiplier built

using advanced CMOS technology.

The LMU112 is pin and functionally

compatible with Fairchilds’s MPY112K.

The A and B input operands are

loaded into their respective registers

on the rising edge of the separate

clock inputs (CLK A and CLK B).

Two’s complement or unsigned

magnitude operands are accommo-

dated via the operand control bit (TC)

LMU112 BLOCK DIAGRAM

A REGISTER

CLK A

CLK B

12

24

OE

B11-0

A11-0

R23-8

TC

FORMAT ADJUST

16

B REGISTER

RESULT REGISTER

16

which is loaded along with the B

operands. The operands are specified

to be in two’s complement format

when TC is asserted and unsigned

magnitude when TC is deasserted.

Mixed mode operation is not allowed.

For two’s complement operands, the

17 most significant bits at the output

of the asynchronous multiplier array

are shifted one bit position to the left.

This is done to discard the redundant

copy of the sign-bit, which is in the

most significant bit position, and

extend the bit precision by one bit.

The result is then truncated to the 16

MSB’s and loaded into the output

register on the rising edge of CLK B.

The contents of the output register are

made available via three-state buffers

by asserting OE. When OE is de-

asserted, the outputs (R23-8) are in the

high impedance state.

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Аналогичное описание - LMU112PC25

производитель	номер детали	датащи	подробное описание детали
Fairchild Semiconductor	TMC2250A	186Kb / 23P	Matrix Multiplier 12 x 10 bit, 50 MHz
LOGIC Devices Incorpora...	LF2250	369Kb / 15P	12 x 10-bit Matrix Multiplier
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	LMU08	176Kb / 7P	8 x 8-bit Parallel Multiplier
	LMU16	188Kb / 7P	16 x 16-bit Parallel Multiplier
	LMU18	184Kb / 7P	16 x 16-bit Parallel Multiplier
	LMU217	178Kb / 6P	16 x 16-bit Parallel multiplier
Zarlink Semiconductor I...	PDSP16112	456Kb / 9P	16 X 12 BIT COMPLEX MULTIPLIER
Cadeka Microcircuits LL...	TMC2250A	295Kb / 23P	Matrix Multiplier 12 x 10 bit, 50 MHz

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Аналогичный номер детали - LMU112PC25

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