TSM3911D datasheet(2/6 Pages) TSC

2 / 6 page

TSM3911D

20V Dual P-Channel MOSFET

2/6

Version: C14

Electrical Specifications

Parameter

Conditions

Symbol

Min

Typ

Max

Unit

Static

(Note 3)

Drain-Source Breakdown Voltage

VGS = 0V, ID = -250µA

BVDSS

-20

Gate Threshold Voltage

VDS = VGS, ID = -250µA

VGS(TH)

-0.45

-0.95

Gate Body Leakage

VGS = ±8V, VDS = 0V

IGSS

±100

Zero Gate Voltage Drain Current

VDS = -16V, VGS = 0V

IDSS

-1.0

µA

On-State Drain Current

VDS =-5V, VGS = -5V

ID(ON)

-5

Drain-Source On-State Resistance

VGS = -4.5V, ID = -2.2A

RDS(ON)

115

140

mΩ

VGS = -2.5V, ID = -1.8A

163

200

VGS = -1.8V, ID = -1A

220

300

Forward Transconductance

VDS = -5V, ID = -2.2A

gfs

Diode Forward Voltage

IS = -1.05A, VGS = 0V

VSD

- 0.8

-1.2

Dynamic

(Note 4)

Total Gate Charge

VDS = -6V, ID = -2.8A,

VGS = -4.5V

15.23

Gate-Source Charge

Qgs

5.49

Gate-Drain Charge

Qgd

2.74

Input Capacitance

VDS = -6V, VGS = 0V,

f = 1.0MHz

Ciss

882.51

Output Capacitance

Coss

145.54

Reverse Transfer Capacitance

Crss

97.26

Switching

(Note 4,5)

Turn-On Delay Time

VDD = -6V, RL = 6Ω,

ID = -1A, VGEN = -4.5V,

RG = 6Ω

td(on)

17.28

Turn-On Rise Time

3.73

Turn-Off Delay Time

td(off)

36.05

Turn-Off Fall Time

6.19

Notes:

1. Pulse width limited by the Maximum junction temperature

2. Surface Mounted on FR4 Board, t ≤ 5 sec.

3. pulse test: PW ≤300µS, duty cycle ≤2%

4. For DESIGN AID ONLY, not subject to production testing.

5. Switching time is essentially independent of operating temperature.

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