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LTC692C датащи(PDF) 13 Page - Linear Technology

номер детали LTC692C
подробное описание детали  Microprocessor Supervisory Circuits
PDF  16 Pages
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LTC692C датащи(HTML) 13 Page - Linear Technology

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LTC692/LTC693
Figure 12. Oscillator Configurations
S
APPLICATI
I FOR ATIO
The LTC693 provides an additional output (Watchdog
Output, WDO) which goes low if the watchdog timer is
allowed to time out and remains low until set high by the
next transition on the WDI pin. WDO is also set high when
VCC falls below the reset voltage threshold or VBATT.
The LTC693 has two additonal pins OSC SEL and OSC IN,
which allow reset active time and watchdog time-out
period to be adjusted per Table 2. Several configurations
are shown in Figure 12.
OSC IN can be driven by an external clock signal or an
external capacitor can be connected between OSC IN and
GND when OSC SEL is forced low. In these configurations,
the nominal reset active time and watchdog time-out
period are determined by the number of clocks or set by
the formula in Table 2. When OSC SEL is high or floating,
the internal oscillator is enabled and the reset active time
is fixed at 140ms minimum. OSC IN selects between the
1 second and 70ms minimum normal watchdog time-out
periods. In both cases, the time-out period immediately
after a reset is at least 1 second.
Figure 11. Watchdog Time-out Period and Reset Active Time
t1 = RESET ACTIVE TIME
t2 = NORMAL WATCHDOG TIME-OUT PERIOD
t3 = WATCHDOG TIME-OUT PERIOD IMMEDIATELY
AFTER A RESET
VCC = 5V
t2
t3
t1
t1
WDO
WDI
RESET
LTC692/3 • F11
EXTERNAL CLOCK
INTERNAL OSCILLATOR
1.6 SECOND WATCHDOG
INTERNAL OSCILLATOR
100ms WATCHDOG
EXTERNAL OSCILLATOR
GND
GND
GND
GND
VCC
VCC
VCC
OSC SEL
OSC SEL
OSC SEL
OSC SEL
OSC IN
OSC IN
OSC IN
OSC IN
3
3
3
3
4
4
4
4
8
8
8
8
7
7
7
7
VCC
FLOATING
OR HIGH
FLOATING
OR HIGH
LTC693
FLOATING
OR HIGH
LTC693
LTC693
LTC693
LTC692/3 • F12
5V
5V
5V
5V



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