11

LTC1707

A second, more severe transient is caused by switching in

loads with large (>1

µF) supply bypass capacitors. The

discharged bypass capacitors are effectively put in parallel

deliver enough current to prevent this problem if the load

switch resistance is low and it is driven quickly. The only

solution is to limit the rise time of the switch drive so that

Thus, a 10

µF capacitor charging to 3.3V would require a

250

µs rise time, limiting the charging current to about

130mA.

PC Board Layout Checklist

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC1707. These items are also illustrated graphically in

the layout diagram of Figure 7. Check the following in your

layout:

1. Are the signal and power grounds segregated? The

LTC1707 signal ground consists of the resistive

LTC1707. The power ground traces should be kept

short, direct and wide. The signal ground and power

ground should converge to a common node in a star-

ground configuration.

resistors? The resistive divider R1/R2 must be con-

possible? This capacitor provides the AC current to the

internal power MOSFETs.

4. Keep the switching node SW away from sensitive small-

signal nodes.

Figure 7. LTC1707 Layout Diagram

OPTIONAL

L1

R2

R1

BOLD LINES INDICATE HIGH CURRENT PATHS

1

2

3

4

8

7

6

5

SYNC/MODE

SW

RUN/SS

GND

LTC1707

1707 F07

+

–

+

–

+

+

APPLICATIO S I FOR ATIO