LTC1623CS8 datasheet(3/12 Pages) LINER

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LTC1623

ELECTRICAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

TA = 25°C, VCC = 5V unless otherwise specified. CGA = 1000pF, CGB = 1000pF

PIN FUNCTIONS

DATA: (Pin 1) Open-Drain Connected Serial Data Inter-

face. Must be pulled high to VCC with external resistor. The

pull-up current must be limited to 350

µA.

CLK: (Pin 2) Serial Clock Interface. Must be pulled high to

VCC with external resistor. The pull-up current must be

limited to 350

µA.

AD0: (Pin 3) Lower Three-State Programmable Address

Pin. Must be connected directly to VCC, GND, or VCC/2

(using two resistors

≤ 1M). Do not float this pin.

GND: (Pin 4) Ground.

AD1: (Pin 5) Higher Three-State Programmable Address

Pin. Must be connected directly to VCC, GND, or VCC/2

(using two resistors

≤ 1M). Do not float this pin.

GB: (Pin 6) Gate Drive to External High-Side Switch. Fully

enhanced by internal charge pump. Controlled by 2nd

LSB of command byte.

GA: (Pin 7) Gate Drive to External High-Side Switch. Fully

enhanced by internal charge pump. Controlled by LSB of

command byte.

VCC: (Pin 8) Input Supply Voltage. Range from 2.7V to

5.5V.

VIL

AD0 and AD1 Input Low Voltage

VCC = 2.7V to 5.5V

0.2

VIH

AD0 and AD1 Input High Voltage

VCC = 2.7V to 5.5V

VCC – 0.2

VOL

Data Output Low Voltage

VCC = 2.7 to 5.5V, IPULLUP = 350µA

0.22

0.4

CIN

Input Capacitance

5pF

(DATA, CLK, AD0, AD1)

IIN

Input Leakage Current (DATA, CLK)

±1

µA

Input Leakage Current(AD0, AD1)

±250

SMBus Related Specs (Note 6)

fSMB

SMBus Operating Frequency

100

kHz

tSUSTA

Start Condition Setup Time

4.7

µs

tBUF

Bus Free Time Between Stop and Start

4.7

µs

tHDSTA

Start Condition Hold Time

4.0

µs

tSUSTP

Stop Condition Setup Time

4.0

µs

tHDDAT

Data Hold Time

300

tSUDAT

Data Setup Time

250

tLOW

Clock Low Period

4.7

µs

tHIGH

Clock High Period

4.0

µs

Clock /Data Fall Time

300

Clock/Data Rise Time

1000

IPULLUP

Current Through External Pull-Up

(Data Pull-Down Current Capacity)

100

350

µA

Resistor on DATA Pin

VCC = 2.7V to 5.5V

Note 4: ON is enabled upon receiving the Stop condition from the SMBus

master.

Note 5: OFF is enabled upon receiving the Stop condition from the SMBus

master.

Note 6: SMBus timing specs are guaranteed but not tested.

The q denotes the specifications which apply over the full operating

temperature range.

Note 1: Approximately 3% hysteresis is provided to ensure stable

operation and eliminate false triggering by minor VCC glitches.

Note 2: Measured from VCC > VUVLO to SMBus ready for data input.

Note 3: The oscillator frequency is not tested directly but is inferred from

turn-on time.

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