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LTC1417AIGN датащи(PDF) 21 Page - Linear Technology |
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LTC1417AIGN датащи(HTML) 21 Page - Linear Technology |
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21 / 32 page ![]() 21 LTC1417 12 11 10 987654321 0 FILL ZEROS D13 t2 t3 123456789 10 11 12 13 14 15 16 Hi-Z DATA N Hi-Z (SAMPLE N) DOUT EXTCLKIN = 5 CONVST t10 tCONV t5 HOLD SAMPLE t6 t7 t9 1417 F19 t8 BUSY SCLK RD D11 D12 CAPTURE ON RISING CLOCK D13 t12 t11 tLSCLK tHSCLK SCLK VIL VOH VOL DOUT CAPTURE ON FALLING CLOCK LTC1417 BUSY CONVST 14 13 9 12 7 CONVST RD SCLK DOUT µP OR DSP INT C0 SCK MISO APPLICATIONS INFORMATION Figure 19. Internal Conversion Clock Selected. Data Transferred After Conversion Using an External SCLK. BUSY ↑ Indicates End of Conversion MICROWIRE is a trademark of National Semiconductor Corporation. Serial Data Output After a Conversion Using an Internal Conversion Clock and an External Data Clock. In this mode, data is output after the end of each conversion and before the next conversion is started (Figure 19). The internal clock is used as the conversion clock and an external clock is used for the SCLK. This mode is useful in applications where the processor acts as a serial bus master device. This mode is SPI and MICROWIRE TM compatible. It also allows operation when the SCLK frequency is very low (less than 30kHz). To select the internal conversion clock, tie EXTCLKIN high. The external SCLK is applied to SCLK. RD can be used to gate the external SCLK, such that data will clock only after RD goes low and to three-state DOUT after data transfer. If more than 16 SCLKs are provided, more zeros will be filled in after the data word indefinitely. |
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