LTC1276AC datasheet(5/24 Pages) LINER

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LTC1273

LTC1275/LTC1276

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Bus Relinquish Time

Commercial

Military

HBEN to RD Setup Time

0ns

HBEN to RD Hold Time

0ns

t10

Delay Between RD Operations

t11

Delay Between Conversions

(Note 10)

500

Commercial

600

Military

1000

t12

Aperture Delay of Sample-and-Hold

TI I G CHARACTERISTICS

LTC1273A/LTC1275A/LTC1276A

LTC1273B/LTC1275B/LTC1276B

See Timing Characteristics Figures (Note 5)

Note 6: Linearity, offset and full scale specifications apply for unipolar and

bipolar modes.

Note 7: Integral nonlinearity is defined as the deviation of a code from a

straight line passing through the actual endpoints of the transfer curve.

The deviation is measured from the center of the quantization band.

Note 8: Bipolar offset (LTC1275/LTC1276) is the different voltage

measured from – 0.5LSB when the LTC1275/LTC1276 output code flickers

between 0000 0000 0000 and 1111 1111 1111.

Note 9: Guaranteed by design, not subject to test.

Note 10: Recommended operating conditions.

Note11: AIN must not exceed VDD or fall below VSS by more than 50mV for

specified accuracy. Therefore the minimum supply voltage for the

LTC1273 is + 4.95V. The minimum supplies for the LTC1275 are +4.75V

and – 2.45V and the minimum supplies for the LTC1276 are

±4.95V.

The q indicates specifications which apply over the full operating

temperature range; all other limits and typicals TA = 25°C.

Note 1: Absolute maximum ratings are those values beyond which the life

of a device may be impaired.

Note 2: All voltage values are with respect to ground with DGND and

AGND wired together (unless otherwise noted).

Note 3: When these pin voltages are taken below VSS (ground for

LTC1273) or above VDD, they will be clamped by internal diodes. This

product can handle input currents greater than 60mA below VSS (ground

for LTC1273) or above VDD without latch-up.

Note 4: When these pin voltages are taken below VSS (ground for

LTC1273) they will be clamped by internal diodes. This product can handle

input currents greater than 60mA below VSS (ground for LTC1273)

without latch-up. These pins are not clamped to VDD.

Note 5: VDD = 5V (VSS = – 5V for LTC1275/LTC1276), 300kHz at 70°C and

250kHz at 125

°C, tr = tf = 5ns unless otherwise specified.

TI I G CHARACTERISTICS (Note 5)

Slow Memory Mode, Parallel Read Timing Diagram

ROM Mode, Parallel Read Timing Diagram

BUSY

DATA

TRACK

OLD DATA

DB11 TO DB0

NEW DATA

DB11 TO DB0

HOLD

LTC1273/75/76 • TA03

t10

t11

tCONV

t12

OLD DATA

DB11 TO DB0

NEW DATA

DB11 TO DB0

DATA

TRACK

HOLD

BUSY

LTC1273/75/76 • TA04

tCONV

t11

tCONV

t12

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