LTC1093CSW datasheet(18/32 Pages) LINER

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LTC1091/LTC1092

LTC1093/LTC1094

APPLICATI

I FOR ATIO

Hardware and Software Interface to

Motorola MC68HC05C4 Processor

Motorola SPI (MC68HC05C4, MC68HC11)

The MC68HC05C4 has been chosen as an example of an

MPU with a dedicated serial port. This MPU transfers data

MSB first and in 8-bit increments. With two 8-bit transfers,

the A/D result is read into the MPU. The first 8-bit transfer

sends the DIN word to the LTC1091 and clocks B9 and B8

of the A/D conversion result into the processor. The

second 8-bit transfer clocks the remaining bits, B7 through

B0, into the MPU.

ANDing the first MPU received byte with 03 Hex clears the

six most significant bits. Notice how the position of the

start bit in the first MPU transmit word is used to position

the A/D result right justified in two memory locations.

X = DON’T CARE

1091/2/3/4 AI15

CLK

DOUT

MPU RECEIVED

WORD

MPU TRANSMIT

WORD

START

BIT

BYTE 1

DIN

START

MSBF

SGL/

DIFF

ODD/

SIGN

SGL/

DIFF

ODD/

SIGN

BYTE 2 (DUMMY)

BYTE 1

1ST TRANSFER

BYTE 2

DON’T CARE

2ND TRANSFER

Data Exchange Between LTC1091 and MC68HC05C4

1091-4 AI16

BYTE 1

DOUT from LTC1091 Stored in MC68HC05C4 RAM

MSB

LOCATION A

LSB

LOCATION A + 1

BYTE 2

LTC1091

CLK

DIN

DOUT

ANALOG

INPUTS

SCK

MOSI

MISO

MC68HC05C4

LABEL

MNEMONIC

COMMENTS

START

BCLRn

Bit 0 Port C Goes Low (CS Goes Low)

LDA

Load LTC1090 DIN Word into Acc

STA

Load LTC1090 DIN Word into SPI from Acc

Transfer Begins

TST

Test Status of SPIF

BPL

Loop to Previous Instruction If Not Done

with Transfer

LDA

Load contents of SPI Data Register into

Acc (DOUT MSBs)

STA

Start Next SPI Cycle

AND

Clear 6 MSBs of First DOUT Word

STA

Store in Memory Location A (MSBs)

TST

Test Status of SPIF

BPL

Loop to Previous Instruction If Not Done

with Transfer

BSETn

Set B0 of Port C (CS Goes High)

LDA

Load contents of SPI Data Register into

Acc (DOUT LSBs)

STA

Store in Memory location A + 1 (LSBs)

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