LTC1096AI datasheet(16/28 Pages) LINER

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LTC1096/LTC1096L

LTC1098/LTC1098L

CLK

DATA (DIN/DOUT)

START

SGL/DIFF

ODD/SIGN

MSBF

•••

MSBF BIT LATCHED

BY LTC1098(L)

LTC1098(L) CONTROLS DATA LINE AND SENDS

A/D RESULT BACK TO MPU

MPU CONTROLS DATA LINE AND SENDS

MUX ADDRESS TO LTC1098(L)

PROCESSOR MUST RELEASE

DATA LINE AFTER 4TH RISING CLK

AND BEFORE THE 4TH FALLING CLK

LTC1098(L) TAKES CONTROL OF

DATA LINE ON 4TH FALLING CLK

LTC1-96/8 • F03

APPLICATI

I FOR ATIO

Figure 3. LTC1098(L) Operation with DIN and DOUT Tied Together

CLK edge after the start bit is received (see Figure 3).

Therefore the processor port line must be switched to an

input before this happens, to avoid a conflict.

In the Typical Applications section, there is an example of

interfacing the LTC1098(L) with DIN and DOUT tied to-

gether to the Intel 8051 MPU.

ACHIEVING MICROPOWER PERFORMANCE

With typical operating currents of 40

µA and automatic

shutdown between conversions, the LTC1096/LTC1098

achieves extremely low power consumption over a wide

range of sample rates (see Figure 4). In systems that

convert continuously, the LTC1096/LTC1098 will draw its

normal operating power continuously. Figure 5 shows

that the typical current varies from 40

µA at clock rates

below 50kHz to 100

µA at 500kHz. Several things must

be taken into account to achieve such a low power

consumption.

Shutdown

Figures 1 and 2 show the operating sequence of the

LTC1096/LTC1098. The converter draws power when the

CS pin is low and powers itself down when that pin is high.

If the CS pin is not taken to ground when it is low and not

taken to supply voltage when it is high, the input buffers of

CLOCK FREQUENCY (Hz)

120

140

100

10k

100k

LTC1096/98 • F05

100

0.002

TA = 25°C

VCC = 5V

ACTIVE (CS LOW)

SHUTDOWN (CS HIGH)

ACTIVE AND SHUTDOWN MODES

SAMPLE FREQUENCY, fSMPL (kHz)

0.1

100

1000

100

LTC1096/98 • TPC03

TA = 25°C

VCC = VREF = 5V

Figure 4. Automatic Power Shutdown Between Conversions

Allows Power Consumption to Drop with Sample Rate

Figure 5. After a Conversion, When the Microprocessor

Drives CS High, the ADC Automatically Shuts Down Until the

Next Conversion. The Supply Current, Which Is Very Low

During cConversions, Drops to Zero in Shutdown

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