LTC1090AC datasheet(4/28 Pages) LINER

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LTC1090

1090fc

DIGITAL A D DC ELECTRICAL CHARACTERISTICS

LTC1090/LTC1090A

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

VIH

High Level lnput Voltage

VCC = 5.25V

●

2.0

VIL

Low Level Input Voltage

VCC = 4.75V

●

0.8

IIH

High Level lnput Current

VIN = VCC

●

2.5

µA

IIL

Low Level Input Current

VIN = 0V

●

–2.5

µA

VOH

High Level Output Voltage

VCC = 4.75V, lO = 10µA

4.7

VCC = 4.75V, lO = 360µA

●

2.4

4.0

VOL

Low Level Output Voltage

VCC = 4.75V, lO = 1.6mA

●

0.4

IOZ

Hi-Z Output Leakage

VOUT = VCC, CS High

●

µA

VOUT = 0V, CS High

●

–3

µA

ISOURCE

Output Source Current

VOUT = 0V

–10

ISINK

Output Sink Current

VOUT = VCC

ICC

Positive Supply Current

CS High, REF+ Open

●

1.0

2.5

IREF

Reference Current

VREF = 5V

●

0.5

1.0

I–

Negative Supply Current

CS High, V– = – 5V

●

150

µA

The ● denotes specifications which apply

over the full operating temperature range, otherwise specification are TA = 25°C. (Note 3)

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 2: All voltage values are with respect to ground with DGND, AGND

and REF– wired together (unless otherwise noted).

Note 3: VCC = 5V, VREF + = 5V, VREF – = 0V, V

– = 0V for unipolar mode and

–5V for bipolar mode, ACLK = 2.0MHz, SCLK = 0.5MHz unless otherwise

specified.

Note 4: These specs apply for both unipolar and bipolar modes. In bipolar

mode, one LSB is equal to the bipolar input span (2VREF) divided by 1024.

For example, when VREF = 5V, 1LSB (bipolar) = 2(5V)/1024 = 9.77mV.

Note 5: Linearity error is specified between the actual end points of the

A/D transfer curve.

Note 6: Total unadjusted error includes offset, gain, linearity, multiplexer

and hold step errors.

Note 7: Two on-chip diodes are tied to each reference and analog input

which will conduct for reference or analog input voltages one diode drop

below V– or one diode drop above VCC. Be careful during testing at low

VCC levels (4.5V), as high level reference or analog inputs (5V) can cause

this input diode to conduct, especially at elevated temperatures, and cause

errors for inputs near full-scale. This spec allows 50mV forward bias of

either diode. This means that as long as the reference or analog input does

not exceed the supply voltage by more than 50mV, the output code will be

correct. To achieve an absolute 0V to 5V input voltage range will therefore

require a minimum supply voltage of 4.950V over initial tolerance,

temperature variations and loading.

Note 8: Channel leakage current is measured after the channel selection.

Note 9: To minimize errors caused by noise at the chip select input, the

internal circuitry waits for two ACLK falling edges after a chip select falling

edge is detected before responding to control input signals. Therefore, no

attempt should be made to clock an address in or data out until the

minimum chip select setup time has elapsed.

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