LT1777CS datasheet(15/24 Pages) LINER

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LT1777

However, remember that oscillator slowdown to achieve

short-circuit protection (discussed above) is dependent

on FB pin behavior, and this in turn, is sensitive to FB node

external impedance. The graph in Figure 7 shows the

typical relationship between FB pin voltage, driving im-

pedance and oscillator frequency. This shows that as

feedback network impedance increases beyond 10k, com-

plete oscillator slowdown is not achieved, and short-

circuit protection may be compromised. And as a practical

matter, the product of FB pin bias current and larger FB

network impedances will cause increasing output voltage

error. (Nominal cancellation for 10k of FB Thevenin im-

pedance is included internally.)

Thermal Considerations

Care should be taken to ensure that the worst-case input

voltage and load current conditions do not cause exces-

sive die temperatures. The SO16 package is rated at

°C/W when the four corner package pins are connected

to a good ground plane. (These corner pins are internally

fused to the die paddle for improved thermal perfor-

mance.) Die junction temperature is then a function of

ambient temperature and internal dissipation as follows:

TJ = TA + θJA • PINT

Total internally dissipated power is composed of three

parts, quiescent power, DC switch loss and AC switch

loss. The AC switch loss will often dominate the total

dissipation, and this is unfortunately difficult to estimate

accurately.

Two options are suggested to the potential user. The first

is to observe the graphical data presented in the Typical

Applications section. Internal LT1777 dissipation vs load

current is given for output voltages of 5V and 3.3V, with

input voltages of 12V, 24V and 36V, and with sense

inductors of 0

µH, 1µH, and 2.2µH (Figures 9 and 11).

While it is true that the user’s ultimate circuit may use

somewhat different passive components than the ex-

amples given, it turns out that internal IC dissipation is not

very sensitive to these changes.

In cases where the user’s potential circuit differs signifi-

cantly from the examples given, an empirical method is

suggested. Operate the proposed power supply over the

applicable input voltage and load current ranges. Measure

the input power and output power, and calculate the

difference as “lost power.” This measured lost power

minus estimated inductor and diode dissipation yields a

figure for internal LT1777 dissipation. Fortunately, as

LT1777 internal dissipation dominates total lost power,

inductor and diode power need not be estimated very

accurately. Inductor power may be estimated as I2R where

I is the load current and R is the DC resistance of the

inductor. (Loss in the sense inductor is usually so small

that only the main inductor must be considered.) Diode

power may be estimated as 1/2 • VF • I • DC, where VF is the

diode forward voltage, I is the load current and DC is the

duty cycle percentage when the diode is conducting.

Frequency Compensation

Loop frequency compensation is performed by connect-

ing a capacitor, or in most cases a series R/C, from the

output of the error amplifier (VC pin) to ground. Proper

loop compensation may be obtained by empirical meth-

ods as described in detail in Application Note AN19.

Briefly, this involves applying a load transient and observ-

ing the dynamic response over the expected range of VIN

and ILOAD values.

As a practical matter, a second small capacitor, directly

from the VC pin to ground is generally recommended to

attenuate capacitive coupling from the VSW and VD pins. A

typical value for this capacitor is 100pF. (See Switch Node

Considerations).

Switch Node Considerations

In spite of the fact that the LT1777 is a low noise converter,

it is still possible for the part to cause problems by

“coupling to itself.” Specifically, this can occur if the VSW

pin is allowed to capacitively couple in an uncontrolled

manner to the part’s high impedance nodes, i.e., SHDN,

SYNC, VC and FB. This can cause erratic operation such as

odd/even cycle behavior, pulse width “nervousness”, im-

proper output voltage and/or premature current limit

action.

APPLICATIONS INFORMATION

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