LT1633CS datasheet(12/16 Pages) LINER

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LT1632/LT1633

APPLICATIONS INFORMATION

amplifiers operate over a very wide supply range, it is

possible to exceed the maximum junction temperature of

150

°C in plastic packages under certain conditions. Junc-

tion temperature TJ is calculated from the ambient tem-

perature TA and power dissipation PD as follows:

LT1632CN8: TJ = TA + (PD • 130°C/W)

LT1632CS8: TJ = TA + (PD • 190°C/W)

LT1633CS: TJ = TA + (PD • 150°C/W)

The power dissipation in the IC is the function of the supply

voltage, output voltage and load resistance. For a given

supply voltage, the worst-case power dissipation PDMAX

occurs at the maximum supply current and when the

output voltage is at half of either supply voltage (or the

maximum swing if less than 1/2 supply voltage). There-

fore PDMAX is given by:

PDMAX = (VS • ISMAX) + (VS/2)2/RL

To ensure that the LT1632/LT1633 are used properly,

calculate the worst-case power dissipation, use the ther-

mal resistance for a chosen package and its maximum

junction temperature to derive the maximum ambient

temperature.

Example: An LT1632CS8 operating on

±15V supplies and

driving a 500

Ω, the worst-case power dissipation per

amplifier is given by:

PDMAX = (30V • 5.6mA) + (15V – 7.5V)(7.5/500)

= 0.168 + 0.113 = 0.281W

If both amplifiers are loaded simultaneously, then the total

power dissipation is 0.562W. The SO-8 package has a

junction-to-ambient thermal resistance of 190

°C/W in still

air. Therefore, the maximum ambient temperature that the

part is allowed to operate is:

TA = TJ – (PDMAX • 190°C/W)

TA = 150°C – (0.562W • 190°C/W) = 43°C

For a higher operating temperature, lower the supply

voltage or use the DIP package part.

Input Offset Voltage

The offset voltage changes depending upon which input

stage is active, and the maximum offset voltages are

trimmed to less than 1350

µV. To maintain the precision

characteristics of the amplifier, the change of VOS over the

entire input common mode range (CMRR) is guaranteed

to be less than 1500

µV on a single 5V supply.

Input Bias Current

The input bias current polarity depends on the input

common mode voltage. When the PNP differential pair is

active, the input bias currents flow out of the input pins.

VBIAS

+IN

–IN

OUT

V –

V +

Q12

Q14

1632/33 F01

225

Ω

225

Ω

V –

Q11

Q13

Q15

BUFFER

AND

OUTPUT BIAS

Figure 1. LT1632 Simplified Schematic Diagram

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