LT1533CS datasheet(9/20 Pages) LINER

9 / 20 page

LT1533

slower slewing waveforms will dissipate more power so

that efficiency will drop. You can also monitor this as you

make your slew adjustment by measuring input and out-

put voltage and current.

It is possible to use a single slew setting resistor. In this

case the RVSL and RCSL pins are tied together. A resistor

with a value of 2k to 34k (one half the individual resistors)

can then be tied from these pins to ground.

Emitter Inductance

A small inductance in the power ground minimizes a

potential dip in the output current falling edge that can

occur under fast slewing, 25nH is usually sufficient. Greater

than 50nH may produce unwanted oscillations in the

voltage output. The inductance can be created by wire or

board trace with the equivalent of one inch of straight

length. A spiral board trace will require less length.

Positive Output Voltage Setting

Sensing of a positive output voltage is usually done using

a resistor divider from the output to the FB pin. The

positive input to the error amp is connected internally to a

1.25V bandgap reference. The FB pin will regulate to this

voltage.

internal regulator voltage (2.4V typ), output regulation

may be disrupted. A series resistance with the feedback

pin can eliminate this potential problem.

Negative Output Voltage Setting

Negative output voltage can be sensed using the NFB pin.

In this case regulation will occur when the NFB pin is at

– 2.5V. The input bias current for the NFB is –25

µA (INFB)

which needs to be accounted for in setting up the divider.

Referring to Figure 2, R1 is chosen such that:

OUT

2 25

−













.•

APPLICATIONS INFORMATION

FB PIN

1533 F01

VOUT

Referring to Figure 1, R1 is determined by:

VOUT

125

=−









The FB bias current represents a small error and can

usually be ignored for values of R1

||R2 up to 10k.

One word of caution. Sometimes a feedback zero is added

to the control loop by placing a capacitor across R1 above.

If the feedback capacitively pulls the FB pin above the

Figure 1

A suggested value for R2 is 2.5k. The NFB pin is normally

left open if the FB pin is being used.

Dual Polarity Output Voltage Sensing

Certain applications may benefit from sensing both posi-

tive and negative output voltages. When doing this each

output voltage resistor divider is individually set as previ-

ously described. When both FB and NFB pins are used, the

LT1533 will act to prevent either output from going

beyond its set output voltage. The highest output (lightest

load) will dominate control of the regulator. This technique

would prevent either output from going unregulated high

at no load. However, this technique will also compromise

output load regulation.

Shutdown

If the shutdown pin is pulled low, the regulator will turn off.

The supply current will be reduced to less than 20

µA.

NFB PIN

INFB

1533 F02

–VOUT

Figure 2

LT1533CS датащи(PDF) 9 Page - Linear Technology

LT1533CS датащи(HTML) 9 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

датащи скачать

ссылки URL