7

LT1394

Common Mode Considerations

The LT1394 is specified for a common mode range of – 5V

to 3.5V on a

±5V supply or a common mode range of 0V

to 3.5V on a single 5V supply. A more general consider-

ation is that the common mode range is 0V below the

negative supply and 1.5V below the positive supply, inde-

pendent of the actual supply voltage. The criterion for

common mode limit is that the output still responds

correctly to a small differential input signal.

When either input signal falls below the negative common

mode limit, the internal PN diode formed with the sub-

strate can turn on, resulting in significant current flow

through the die. An external Schottky clamp diode

between the input and the negative rail can speed up

recovery from negative overdrive by preventing the sub-

strate diode from turning on. The zero-crossing detector

in Figure 1 demonstrates the use of a fast clamp diode.

The zero-crossing detector terminates the transmission

line at its 50

Ω characteristic impedance. Negative inputs

should not fall below – 2V to keep the signal current within

the clamp diode’s maximum forward rating. Positive

inputs should not exceed the device’s absolute maximum

ratings or the power rating on the terminating resistor.

Either input may go above the positive common mode

limit without damaging the comparator. The upper voltage

limit is determined by an internal diode from each input to

the positive supply. The input may go above the positive

supply as long as it does not go far enough above it to

conduct more than 10mA. Functionality will continue if the

remaining input stays within the allowed common mode

range. There will, however, be an increase in propagation

delay as the input signal switches back into the common

mode range.

Figure 1. Fast Zero-Crossing Detector

Input Bias Current

Input bias current is measured with the output held at

1.4V. As with any PNP differential input stage, the LT1394

bias current flows out of the device. It will go to zero on an

input which is high and double on an input which is low.

LATCH Pin Dynamics

The LATCH pin is intended to retain input data (output

latched) when the LATCH pin goes high. The pin will float

to a high state when disconnected, so a flow-through

condition requires that the LATCH pin be grounded. The

LATCH pin is designed to be driven with either a TTL or

CMOS output. It has no built-in hysteresis.

To guarantee data retention, the input signal must remain

valid at least 2ns after the latch goes high (hold time), and

must be valid at least – 0.4ns before the latch goes high

(setup time). The negative setup time simply means that

the data arriving 0.4ns after (rather than before) the latch

signal is valid. When the latch signal goes low, new data

will appear at the output in approximately 6ns (latch

propagation delay).

Measuring Response Time

To properly measure the response of the LT1394 requires

an input signal source with very fast rise times and

exceptionally clean settling characteristics. The last

requirement comes about because the standard compara-

tor test calls for an input step size that is large compared

to the overdrive amplitude. Typical test conditions are

100mV step size with 5mV overdrive. This requires an

input signal that settles to within 1% (1mV) of final value

in only a few nanoseconds with no ringing or settling tail.

Ordinary high speed pulse generators are not capable of

generating such a signal, and in any case, no ordinary

oscilloscope is capable of displaying the waveform to

check its fidelity. Some means must be used to inherently

generate a fast, clean edge with known final value. The

circuit shown in Figure 2 is the best electronic means of

generating a fast, clean step to test comparators. It uses

a very fast transistor in a common base configuration. The

transistor is switched off with a fast edge from the genera-

tor and the collector voltage settles to exactly 0V in just a

few nanoseconds. The most important feature of this

1394 F01

5V

–

+

LT1394

Q

Q

CABLE

50

Ω

50

Ω

1N5712