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UPD753012 датащи(PDF) 2 Page - NEC |
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UPD753012 датащи(HTML) 2 Page - NEC |
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2 / 80 page ![]() 2 µPD753012, 753016, 753017 FUNCTIONAL OUTLINE Parameter Function Instruction execution time • 0.95, 1.91, 3.81, 15.3 µs (main system clock: at 4.19 MHz operation) • 0.67, 1.33, 2.67, 10.7 µs (main system clock: at 6.0 MHz operation) • 122 µs (subsystem clock: at 32.768 kHz operation) On-chip memory ROM 12288 × 8 bits ( µPD753012) 16384 × 8 bits ( µPD753016) 24576 × 8 bits ( µPD753017) RAM 1024 × 4 bits General-purpose register • 4-bit operation: 8 × 4 banks • 8-bit operation: 4 × 4 banks Input/ CMOS input 8 On-chip pull-up resistors can be specified by using software: 23 output CMOS input/output 16 port CMOS output 8 Also used for segment pins N-ch open-drain 8 Withstands 13 V, on-chip pull-up resistors can be specified by using mask input/output option Total 40 LCD controller/driver • Segment number selection : 24/28/32 segments (can be changed to CMOS output port in 4 time-unit; max. 8) • Display mode selection : Static 1/2 duty (1/2 bias) 1/3 duty (1/2 bias) 1/3 duty (1/3 bias) 1/4 duty (1/3 bias) On-chip split resistor for LCD drive can be specified by using mask option Timer 5 channels • 8-bit timer/event counter: 3 channels (can be used for 16-bit timer/event counter, carrier generator, or timer with gate) • Basic interval timer/watchdog timer: 1 channel • Watch timer: 1 channel Serial interface • 3-wire serial I/O mode ... MSB or LSB can be selected for transferring top bit • 2-wire serial I/O mode • SBI mode Bit sequential buffer 16 bits Clock output (PCL) • Φ, 524, 262, 65.5 kHz (main system clock: at 4.19 MHz operation) • Φ, 750, 375, 93.8 kHz (main system clock: at 6.0 MHz operation) Buzzer output (BUZ) • 2, 4, 32 kHz (main system clock: at 4.19 MHz operation or subsystem clock: at 32.768 kHz operation) • 2.93, 5.86, 46.9 kHz (main system clock: at 6.0 MHz operation) Vectored interrupts External: 3, Internal: 5 Test input External: 1, Internal: 1 System clock oscillator • Ceramic or crystal oscillator for main system clock oscillation • Crystal oscillator for subsystem clock oscillation Standby function STOP/HALT mode Power supply voltage VDD = 2.2 to 5.5 V Package • 80-pin plastic QFP (14 × 14 mm) • 80-pin plastic TQFP (fine pitch) (12 × 12 mm) |
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