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ISPMACH4ACPLDFAMILY датащи(PDF) 41 Page - Lattice Semiconductor

номер детали ISPMACH4ACPLDFAMILY
подробное описание детали  High Performance E 2 CMOS In-System Programmable Logic
PDF  62 Pages
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производитель  LATTICE [Lattice Semiconductor]
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ISPMACH4ACPLDFAMILY датащи(HTML) 41 Page - Lattice Semiconductor

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ispMACH 4A Family
41
ICC vs. FREQUENCY
These curves represent the typical power consumption for a particular device at system frequen-
cy.The selected “typical” pattern is a 16-bit up-down counter.This pattern fills the device and ex-
ercises every macrocell. Maximum frequency shown uses internal feedback and a D-type register.
Power/Speed are optimized to obtain the highest counter frequency and the lowest power.The
highest frequency (LSBs) is placed in common PAL blocks, which are set to high power.The low-
est frequency signals (MSBs) are placed in a common PAL block and set to lowest power.
350
300
250
200
150
100
50
0
VCC = 5 V or 3.3 V, TA = 25º C
Frequency (MHz)
M4A-32/32
M4A-64/32
M4A-128/64
M4A-256/128
Figure 19. ispMACH 4A ICC Curves at High Speed Mode
M4A-256/160
M4A-64/64
M4A-96/48
400
M4A-512/160
M4A-192/96
M4A-384/160
250
200
150
100
50
0
VCC = 5 V or 3.3 V, TA = 25º C
M4A-32/32
Frequency (MHz)
M4A-64/32
M4A-128/64
M4A-256/128
Figure 20. ispMACH 4A ICC Curves at Low Power Mode
M4A-256/160
M4A-64/64
M4A-96/48
M4A-512/160
M4A-192/96
M4A-384/160



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