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1024 датащи(PDF) 4 Page - Lattice Semiconductor

номер детали 1024
подробное описание детали  In-System Programmable High Density PLD
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Specifications ispLSI 1024/883
4
Switching Test Conditions
Input Pulse Levels
GND to 3.0V
Input Rise and Fall Time
≤ 3ns 10% to 90%
Input Timing Reference Levels
1.5V
Output Timing Reference Levels
1.5V
Output Load
See figure 2
3-state levels are measured 0.5V from steady-state
active level.
Table 2- 0003
DC Electrical Characteristics
Over Recommended Operating Conditions
0.4
–
-10
10
-150
-150
-200
215
VOL
VOH
IIL
IIH
IIL-isp
IIL-PU
IOS1
ICC2,4
I
OL =8 mA
I
OH =-4 mA
0V
≤ V
IN ≤ VIL (MAX.)
3.5V
≤ V
IN ≤ VCC
0V
≤ V
IN ≤ VIL (MAX.)
0V
≤ V
IN ≤ VIL
V
CC = 5V, VOUT = 0.5V
V
IL = 0.5V, VIH = 3.0V
f
TOGGLE = 1 MHz
–
–
–
–
–
–
–
135
–
2.4
–
–
–
–
–
–
CONDITION
PARAMETER
SYMBOL
MIN.
MAX.
Output Low Voltage
Output High Voltage
Input or I/O Low Leakage Current
Input or I/O High Leakage Current
isp Input Low Leakage Current
I/O Active Pull-Up Current
Output Short Circuit Current
Operating Power Supply Current
UNITS
TYP. 3
V
V
µA
µA
µA
µA
mA
mA
1. One output at a time for a maximum duration of one second. V
out = 0.5V was selected to avoid test problems by tester ground
degradation. Characterized but not 100% tested.
2. Measured using six 16-bit counters.
3. Typical values are at V
CC = 5V and TA = 25
oC.
4. Maximum I
CC varies widely with specific device configuration and operating frequency. Refer to the Power Consumption sec-
tion of this datasheet and Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to estimate maximum
I
CC.
0007A-24 mil
Figure 2. Test Load
+ 5V
R1
R2
CL*
Device
Output
Test
Point
*CL includes Test Fixture and Probe Capacitance.
Output Load Conditions (see figure 2)
Test Condition
R1
R2
CL
A
470
Ω
390
Ω
35pF
B
Active High
390
Ω
35pF
Active Low
470
Ω
390
Ω
35pF
Active High to Z
390
Ω
5pF
Cat V
OH - 0.5V
Active Low to Z
470
Ω
390
Ω
5pF
at V
OL + 0.5V
∞
∞
Table 2- 0004A



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