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AN4467 датащи(PDF) 22 Page - STMicroelectronics |
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AN4467 датащи(HTML) 22 Page - STMicroelectronics |
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22 / 33 page ![]() Boot configuration AN4467 22/33 DocID026156 Rev 2 3 Boot configuration 3.1 Boot mode selection In the Root part number 1, three different boot modes can be selected through the BOOT0 pin and nBOOT1 option bit, as shown in Table 2. The values on the BOOT0 pin and nBOOT1 bit are latched on the 4th rising edge of SYSCLK after a reset. The user must set nBOOT1 and BOOT0 to select the required boot mode. BOOT0 is a dedicated pin.The BOOT0 pin and nBOOT1 bit are also resampled when exiting Standby mode. Consequently, they must be kept in the required Boot mode configuration in Standby mode. After this startup delay has elapsed, the CPU fetches the top-of-stack value from address 0x0000 0000, and starts code execution from the boot memory starting from 0x0000 0004. Depending on the selected boot mode, main Flash program memory, system memory or SRAM is accessible as follows: • Boot from main Flash memory: the main Flash program memory is aliased in the boot memory space (0x0000 0000), but is still accessible from its original memory space (0x0800 0000). In other words, the Flash memory contents can be accessed starting from address 0x0000 0000 or 0x0800 0000. • Boot from System memory: the system memory is aliased in the boot memory space (0x0000 0000), but is still accessible from its original memory space (0x1FFF EC00). • Boot from embedded SRAM: the SRAM is aliased in the boot memory space (0x0000 0000), but is still accessible from its original memory space (0x2000 0000). Table 2. Boot modes BOOT mode selection pins Boot mode Aliasing BOOT1(1) 1. The BOOT1 value is the opposite of the nBOOT1 option bit. BOOT0 x 0 Main Flash memory Main Flash memory is selected as boot space 0 1 System memory System memory is selected as boot space 1 1 Embedded SRAM Embedded SRAM is selected as boot space |
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